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Atsushi Takahashi
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Year
Routability of FPGAs with Extremal Switch-Block Structures
Y Takashima, A Takahashi, Y Kajitani
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and …, 1998
891998
Minimal acyclic forbidden minors for the family of graphs with bounded path-width
A Takahashi, S Ueno, Y Kajitani
Discrete Mathematics 127 (1-3), 293-304, 1994
891994
Mixed searching and proper-path-width
A Takahashi, S Ueno, Y Kajitani
Theoretical Computer Science 137 (2), 253-268, 1995
881995
Performance and reliability driven clock scheduling of sequential logic circuits
A Takahashi, Y Kajitani
Proceedings of ASP-DAC'97: Asia and South Pacific Design Automation …, 1997
631997
Self-aligned double and quadruple patterning-aware grid routing with hotspots control
C Kodama, H Ichikawa, K Nakayama, T Kotani, S Nojima, S Mimotogi, ...
2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC), 267-272, 2013
442013
Optimal integer delay budgeting on directed acyclic graphs
E Bozorgzadeh, S Ghiasi, A Takahashi, M Sarrafzadeh
Proceedings of the 40th annual Design Automation Conference, 920-925, 2003
402003
A global routing method for 2-layer ball grid array packages
Y Kubo, A Takahashi
Proceedings of the 2005 international symposium on Physical design, 36-43, 2005
382005
Monotonic parallel and orthogonal routing for single-layer ball grid array packages
Y Tomioka, A Takahashi
Proceedings of the 2006 Asia and South Pacific Design Automation Conference …, 2006
332006
Global routing by iterative improvements for two-layer ball grid array packages
Y Kubo, A Takahashi
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2006
312006
Clock-tree routing realizing a clock-schedule for semi-synchronous circuits
A Takahashi, K Inoue, Y Kajitani
Computer-Aided Design, 1997. Digest of Technical Papers., 1997 IEEE/ACM …, 1997
311997
A Fast Process Variation and Pattern Fidelity Aware Mask Optimization Algorithm
A Awad, A Takahashi, S Tanaka, C Kodama
Proc. IEEE/ACM 2014 International Conference on Computer-Aided Design (ICCAD …, 2014
272014
Practical fast clock-schedule design algorithms
A Takahashi
IEICE Transactions on Fundamentals of Electronics, Communications and …, 2006
262006
Clock period minimization method of semi-synchronous circuits by delay insertion
Y Kohira, A Takahashi
IEICE transactions on fundamentals of electronics, communications and …, 2005
262005
Passenger estimation system using Wi-Fi probe request
W Pattanusorn, I Nilkhamhang, S Kittipiyakul, K Ekkachai, A Takahashi
7th International Conference on Information Communication Technology for …, 2016
252016
CAFE router: A fast connectivity aware multiple nets routing algorithm for routing grid with obstacles
Y Kohira, A Takahashi
IEICE transactions on fundamentals of electronics, communications and …, 2010
232010
CAFE router: A Fast Connectivity Aware Multiple Nets Routing Algorithm for Routing Grid with Obstacles.
Y Kohira, A Takahashi
Proc. Asia and South Pacific Design Automation Conference 2010 (ASP-DAC 2010 …, 2010
232010
Indoor room identify and mapping with virtual based SLAM using furnitures and household objects relationship based on CNNs
P Maolanon, K Sukvichai, N Chayopitak, A Takahashi
2019 10th International Conference of Information and Communication …, 2019
222019
A fast longer path algorithm for routing grid with obstacles using biconnectivity based length upper bound
Y Kohira, S Suehiro, A Takahashi
IEICE Transactions on Fundamentals of Electronics, Communications and …, 2009
202009
A Fast Longer Path Algorithm for Routing Grid with Obstacles using Biconnectivity based Length Upper Bound
Y Kohira, S Suehiro, A Takahashi
Proc. Asia and South Pacific Design Automation Conference 2009 (ASP-DAC 2009 …, 2009
202009
Clock period minimization of semi-synchronous circuits by gate-level delay insertion
T Yoda, A Takahashi
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and …, 1999
201999
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