| Memory devices and applications for in-memory computing A Sebastian, M Le Gallo, R Khaddam-Aljameh, E Eleftheriou Nature nanotechnology 15 (7), 529-544, 2020 | 1325 | 2020 |
| HERMES Core–A 14nm CMOS and PCM-based In-Memory Compute Core using an array of 300ps/LSB Linearized CCO-based ADCs and local digital processing R Khaddam-Aljameh, M Stanisavljevic, JF Mas, G Karunaratne, ... 2021 Symposium on VLSI Circuits, 1-2, 2021 | 95 | 2021 |
| Mixed-precision deep learning based on computational memory SR Nandakumar, M Le Gallo, C Piveteau, V Joshi, G Mariani, I Boybat, ... Frontiers in neuroscience 14, 406, 2020 | 92 | 2020 |
| HERMES-Core—A 1.59-TOPS/mm2 PCM on 14-nm CMOS In-Memory Compute Core Using 300-ps/LSB Linearized CCO-Based ADCs R Khaddam-Aljameh, M Stanisavljevic, JF Mas, G Karunaratne, M Brändli, ... IEEE Journal of Solid-State Circuits 57 (4), 1027-1038, 2022 | 69 | 2022 |
| Fully on-chip MAC at 14 nm enabled by accurate row-wise programming of PCM-based weights and parallel vector-transport in duration-format P Narayanan, S Ambrogio, A Okazaki, K Hosokawa, H Tsai, A Nomura, ... IEEE Transactions on Electron Devices 68 (12), 6629-6636, 2021 | 62 | 2021 |
| A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference M Le Gallo, R Khaddam-Aljameh, M Stanisavljevic, A Vasilopoulos, ... Nature Electronics 6 (9), 680-693, 2023 | 57 | 2023 |
| Computational memory-based inference and training of deep neural networks A Sebastian, I Boybat, M Dazzi, I Giannopoulos, V Jonnalagadda, V Joshi, ... 2019 Symposium on VLSI Technology, T168-T169, 2019 | 47 | 2019 |
| Deep learning acceleration based on in-memory computing E Eleftheriou, M Le Gallo, SR Nandakumar, C Piveteau, I Boybat, V Joshi, ... IBM Journal of Research and Development 63 (6), 7: 1-7: 16, 2019 | 30 | 2019 |
| Precision of bit slicing with in-memory computing based on analog phase-change memory crossbars M Le Gallo, SR Nandakumar, L Ciric, I Boybat, R Khaddam-Aljameh, ... Neuromorphic Computing and Engineering 2 (1), 014009, 2022 | 25 | 2022 |
| An SRAM-based multibit in-memory matrix-vector multiplier with a precision that scales linearly in area, time, and power R Khaddam-Aljameh, PA Francese, L Benini, E Eleftheriou IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29 (2), 372-385, 2020 | 24 | 2020 |
| Analysis and comparative evaluation of stacked-transistor half-bridge topologies implemented with 14 nm bulk CMOS technology PAM Bezerra, RK Aljameh, F Krismer, JW Kolar, A Sridhar, T Brunschwiler, ... 2017 IEEE 18th Workshop on Control and Modeling for Power Electronics …, 2017 | 12 | 2017 |
| Resistive memory device for matrix-vector multiplications R Khaddam-Aljameh, A Sebastian, M Le Gallo-Bourdeau, ... US Patent 10,896,242, 2021 | 10 | 2021 |
| Unassisted true analog neural network training chip Y Kohda, Y Li, K Hosokawa, S Kim, R Khaddam-Aljameh, Z Ren, ... 2020 IEEE International Electron Devices Meeting (IEDM), 36.2. 1-36.2. 4, 2020 | 10 | 2020 |
| A multi-memristive unit-cell array with diagonal interconnects for in-memory computing R Khaddam-Aljameh, M Martemucci, B Kersting, M Le Gallo, RL Bruce, ... IEEE Transactions on Circuits and Systems II: Express Briefs 68 (12), 3522-3526, 2021 | 8 | 2021 |
| Electrical and thermal characterization of an inductor-based ANPC-type buck converter in 14 nm CMOS technology for microprocessor applications PAM Bezerra, F Krismer, JW Kolar, RK Aljameh, S Paredes, R Heller, ... IEEE Open Journal of Power Electronics 1, 456-468, 2020 | 8 | 2020 |
| Training of artificial neural networks M Le Gallo-Bourdeau, R Khaddam-Aljameh, L Kull, PA Francese, TH Toifl, ... US Patent 11,531,898, 2022 | 7 | 2022 |
| Method for implementing processing elements in a chip card M Dazzi, PA Francese, A Sebastian, R Khaddam-Aljameh, ES Eleftheriou US Patent 10,831,691, 2020 | 6 | 2020 |
| Current sensor R Khaddam-Aljameh, PA Francese US Patent 11,499,998, 2022 | 3 | 2022 |
| Electronic system for performing a multiplication of a matrix and vector C Piveteau, A Sebastian, M Le Gallo-Bourdeau, R Khaddam-Aljameh US Patent 11,042,715, 2021 | 3 | 2021 |
| Experimental Efficiency Evaluation of Stacked Transistor Half-Bridge Topologies in 14 nm CMOS Technology PA Martins Bezerra, F Krismer, JW Kolar, R Khaddam-Aljameh, ... Electronics 10 (10), 1150, 2021 | 3 | 2021 |
Abu SebastianDistinguished Scientist, IBM Research - ZurichVerified email at zurich.ibm.com
