An Integrated Optimization Approach for Nano-Hybrid Circuit Cell Mapping Y Xia, Z Chu, W Hung, L Wang, X Song Nanotechnology, IEEE Transactions on 10 (6), 1275-1284, 2011 | 36 | 2011 |
Through-silicon via-based capacitor and its application in LDO regulator design L Qian, K Qian, X He, Z Chu, Y Ye, G Shi, Y Xia IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (8 …, 2019 | 31 | 2019 |
Structural rewriting in XOR-majority graphs Z Chu, M Soeken, Y Xia, L Wang, G De Micheli Proceedings of the 24th Asia and South Pacific Design Automation Conference …, 2019 | 29 | 2019 |
BCD adder designs based on three-input XOR and majority gates Z Chu, Z Li, Y Xia, L Wang, W Liu IEEE Transactions on Circuits and Systems II: Express Briefs 68 (6), 1942-1946, 2020 | 24 | 2020 |
Logic synthesis optimization sequence tuning using RL-based LSTM and graph isomorphism network C Yang, Y Xia, Z Chu, X Zha IEEE Transactions on Circuits and Systems II: Express Briefs 69 (8), 3600-3604, 2022 | 20 | 2022 |
Advanced functional decomposition using majority and its applications Z Chu, M Soeken, Y Xia, L Wang, G De Micheli IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2019 | 19 | 2019 |
A Memetic Approach for Nanoscale Hybrid Circuit Cell Mapping Z Chu, Y Xia, WNN Hung, L Wang, X Song Digital System Design: Architectures, Methods and Tools (DSD), 2010 13th …, 2010 | 17 | 2010 |
CMOL cell assignment by genetic algorithm Y Xia, Z Chu, WNN Hung, L Wang, X Song NEWCAS Conference (NEWCAS), 2010 8th IEEE International, 25-28, 2010 | 16 | 2010 |
Efficient Nonrectangular Shaped Voltage Island Aware Floorplanning with Nonrandomized Searching Engine Z Chu, Y Xia, L Wang, J Wang Microelectronics Journal, 2014 | 13 | 2014 |
Cell Mapping for Nanohybrid Circuit Architecture Using Genetic Algorithm ZF Chu, YS Xia, LY Wang Journal of Computer Science and Technology 27 (1), 113-120, 2012 | 13 | 2012 |
Efficient design of majority-logic-based approximate arithmetic circuits Z Chu, C Shang, T Zhang, Y Xia, L Wang, W Liu IEEE transactions on very large scale integration (VLSI) systems 30 (12 …, 2022 | 12 | 2022 |
The dawn of ai-native eda: Promises and challenges of large circuit models L Chen, Y Chen, Z Chu, W Fang, TY Ho, Y Huang, S Khan, M Li, X Li, ... arXiv preprint arXiv:2403.07257, 2024 | 11 | 2024 |
Deepgate2: Functionality-aware circuit representation learning Z Shi, H Pan, S Khan, M Li, Y Liu, J Huang, HL Zhen, M Yuan, Z Chu, ... 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD), 1-9, 2023 | 11 | 2023 |
Exact synthesis of boolean functions in majority-of-five forms Z Chu, W Haaswijk, M Soeken, Y Xia, L Wang, G De Micheli 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2019 | 11 | 2019 |
2022 roadmap on neuromorphic devices and applications research in China Q Wan, C Wan, H Wu, Y Yang, X Huang, P Zhou, L Chen, TY Wang, Y Li, ... Neuromorphic Computing and Engineering 2 (4), 042501, 2022 | 10 | 2022 |
A high-performance design of generalized pipeline cellular array Z Chu, H Tian, Z Li, Y Xia, L Wang IEEE Computer Architecture Letters 19 (1), 47-50, 2020 | 9 | 2020 |
Functional decomposition using majority Z Chu, M Soeken, Y Xia, G De Micheli 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), 676-681, 2018 | 9 | 2018 |
Improving circuit mapping performance through mig-based synthesis for carry chains Z Chu, X Tang, M Soeken, A Petkovska, G Zgheib, L Amarů, Y Xia, ... Proceedings of the on Great Lakes Symposium on VLSI 2017, 131-136, 2017 | 7 | 2017 |
MinSC: An exact synthesis-based method for minimal-area stochastic circuits under relaxed error bound X Wang, Z Chu, W Qian 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-9, 2021 | 6 | 2021 |
Area optimization of MPRM circuits using approximate computing QH Ying, LY Wang, ZF Chu, YS Xia 2019 IEEE 13th International Conference on ASIC (ASICON), 1-4, 2019 | 6 | 2019 |