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Matthieu ARZEL
Matthieu ARZEL
Professeur, IMT Atlantique
Verified email at imt-atlantique.fr - Homepage
Title
Cited by
Cited by
Year
Codes et turbocodes
C Berrou
Springer Paris, 2010
1872010
Stochastic decoding of turbo codes
QT Dong, M Arzel, C Jego, WJ Gross
IEEE Transactions on Signal Processing 58 (12), 6421-6425, 2010
612010
DFT precoded OFDM—An alternative candidate for next generation PONs
TA Truong, M Arzel, H Lin, B Jahan, M Jézéquel
Journal of Lightwave Technology 32 (6), 1228-1238, 2014
372014
Hardware acceleration of SVM-based traffic classification on FPGA
T Groleat, M Arzel, S Vaton
2012 8th International Wireless Communications and Mobile Computing …, 2012
362012
Soft Error Detection and Correction Technique for Radiation Hardening Based on C-element and BICS
D Gomez Toro, M Arzel, F Seguin, M Jezequel
Circuits and Systems II: Express Briefs, IEEE Transactions on 61 (12), 952-956, 2014
322014
Rethinking weight decay for efficient neural network pruning
H Tessier, V Gripon, M Léonardon, M Arzel, T Hannagan, D Bertrand
Journal of Imaging 8 (3), 64, 2022
262022
Semi-iterative analog turbo decoding
M Arzel, C Lahuec, F Seguin, D Gnaedig, M Jezequel
Circuits and Systems I: Regular Papers, IEEE Transactions on 54 (6), 1305-1316, 2007
252007
A self-powered telemetry system to estimate the postoperative instability of a knee implant
C Lahuec, S Almouahed, M Arzel, D Gupta, C Hamitouche, M Jézéquel, ...
IEEE Transactions on Biomedical Engineering 58 (3), 822-825, 2010
232010
Ultra-Low-Energy Mixed-Signal IC Implementing Encoded Neural Networks
B Larras, C Lahuec, F Seguin, M Arzel
IEEE Transactions on Circuits and Systems I: Regular Papers, 2016
222016
Stretching the edges of SVM traffic classification with FPGA acceleration
T Groleat, M Arzel, S Vaton
IEEE transactions on network and service management 11 (3), 278-291, 2014
212014
Budget Restricted Incremental Learning with Pre-Trained Convolutional Neural Networks and Binary Associative Memories
GB Hacene, V Gripon, N Farrugia, M Arzel, M Jezequel
20*2017
AutoReloc: Automated design flow for bitstream relocation on Xilinx FPGAs
A Lalevée, PH Horrein, M Arzel, M Hübner, S Vaton
202016
Analog implementation of encoded neural networks
B Larras, C Lahuec, M Arzel, F Seguin
2013 IEEE International Symposium on Circuits and Systems (ISCAS), 1612-1615, 2013
202013
Transfer incremental learning using data augmentation
G Boukli Hacene, V Gripon, N Farrugia, M Arzel, M Jezequel
Applied Sciences 8 (12), 2512, 2018
192018
Symbol-based BP detection for MIMO systems associated with non-binary LDPC codes
A Haroun, CA Nour, M Arzel, C Jégo
2014 IEEE Wireless Communications and Networking Conference (WCNC), 212-217, 2014
172014
Stochastic multiple stream decoding of cortex codes
M Arzel, C Lahuec, C Jego, WJ Gross, Y Bruned
Signal Processing, IEEE Transactions on 59 (7), 3486-3491, 2011
172011
Finding All Matches in a Database using Binary Neural Networks
GB Hacene, V Gripon, N Farrugia, M Arzel, M Jezequel
162017
Analog encoded neural network for power management in MPSoC
B Larras, B Boguslawski, C Lahuec, M Arzel, F Seguin, F Heitzmann
New Circuits and Systems Conference (NEWCAS), 2013 IEEE 11th International, 1-4, 2013
162013
Quantized guided pruning for efficient hardware implementations of convolutional neural networks
GB Hacene, V Gripon, M Arzel, N Farrugia, Y Bengio
arXiv preprint arXiv:1812.11337, 2018
152018
Quantized guided pruning for efficient hardware implementations of deep neural networks
GB Hacene, V Gripon, M Arzel, N Farrugia, Y Bengio
2020 18th IEEE International New Circuits and Systems Conference (NEWCAS …, 2020
142020
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