Interface and electrical properties of La-silicate for direct contact of high-k with silicon K Kakushima, K Tachi, M Adachi, K Okamoto, S Sato, J Song, ... Solid-state electronics 54 (7), 715-719, 2010 | 61 | 2010 |
EOT of 0.62 nm and high electron mobility in La-silicate/Si structure based nMOSFETs achieved by utilizing metal-inserted poly-Si stacks and annealing at high temperature T Kawanago, Y Lee, K Kakushima, P Ahmet, K Tsutsui, A Nishiyama, ... IEEE transactions on electron devices 59 (2), 269-276, 2011 | 53 | 2011 |
Observation of band bending of metal/high-k Si capacitor with high energy x-ray photoemission spectroscopy and its application to interface dipole measurement K Kakushima, K Okamoto, K Tachi, J Song, S Sato, T Kawanago, ... Journal of Applied Physics 104 (10), 2008 | 53 | 2008 |
Utilizing self-assembled-monolayer-based gate dielectrics to fabricate molybdenum disulfide field-effect transistors T Kawanago, S Oda Applied Physics Letters 108 (4), 2016 | 49 | 2016 |
Bilayer gate dielectric study by scanning tunneling microscopy YC Ong, DS Ang, KL Pey, SJ O’Shea, KEJ Goh, C Troadec, CH Tung, ... Applied Physics Letters 91 (10), 2007 | 41 | 2007 |
Gate technology contributions to collapse of drain current in AlGaN/GaN Schottky HEMT T Kawanago, K Kakushima, Y Kataoka, A Nishiyama, N Sugii, ... IEEE Transactions on Electron Devices 61 (3), 785-792, 2014 | 31 | 2014 |
Effect of postdeposition annealing temperatures on electrical characteristics of molecular-beam-deposited HfO2 on n-InAs/InGaAs metal–oxide–semiconductor capacitors HD Trinh, YC Lin, HC Wang, CH Chang, K Kakushima, H Iwai, ... Applied Physics Express 5 (2), 021104, 2012 | 29 | 2012 |
Interface and electrical properties of Tm2O3 gate dielectrics for gate oxide scaling in MOS devices M Kouda, T Kawanago, P Ahmet, K Natori, T Hattori, H Iwai, K Kakushima, ... Journal of Vacuum Science & Technology B 29 (6), 2011 | 28 | 2011 |
La2O3 gate dielectrics for AlGaN/GaN HEMT J Chen, T Kawanago, H Wakabayashi, K Tsutsui, H Iwai, D Nohata, ... Microelectronics Reliability 60, 16-19, 2016 | 23 | 2016 |
Selection of rare earth silicates for highly scaled gate dielectrics K Kakushima, K Okamoto, T Koyanagi, M Kouda, K Tachi, T Kawanago, ... Microelectronic engineering 87 (10), 1868-1871, 2010 | 22 | 2010 |
Electronic trap characterization of the Sc2O3∕ La2O3 high-κ gate stack by scanning tunneling microscopy YC Ong, DS Ang, KL Pey, ZR Wang, SJ O’Shea, CH Tung, T Kawanago, ... Applied Physics Letters 92 (2), 2008 | 20 | 2008 |
Band bending measurement of HfO2/SiO2/Si capacitor with ultra-thin La2O3 insertion by XPS K Kakushima, K Okamoto, M Adachi, K Tachi, J Song, S Sato, ... Applied surface science 254 (19), 6106-6108, 2008 | 19 | 2008 |
Electrical characterization of directly deposited La-Sc oxides complex for gate insulator application T Kawanago, K Tachi, J Song, K Kakushima, P Ahmet, K Tsutsui, N Sugii, ... Microelectronic engineering 84 (9-10), 2235-2238, 2007 | 15 | 2007 |
Compensation of oxygen defects in La-silicate gate dielectrics for improving effective mobility in high-k/metal gate MOSFET using oxygen annealing process T Kawanago, T Suzuki, Y Lee, K Kakushima, P Ahmet, K Tsutsui, ... Solid-state electronics 68, 68-72, 2012 | 14 | 2012 |
Control of threshold voltage by gate metal electrode in molybdenum disulfide field-effect transistors T Kawanago, S Oda Applied Physics Letters 110 (13), 2017 | 13 | 2017 |
Direct contact of high-k/Si gate stack for EOT below 0.7 nm using LaCe-silicate Layer with Vfb controllability K Kakushima, T Koyanagi, D Kitayama, M Kouda, J Song, T Kawanago, ... 2010 Symposium on VLSI Technology, 69-70, 2010 | 13 | 2010 |
Metal inserted poly-Si with high temperature annealing for achieving EOT of 0.62 nm in La-silicate MOSFET T Kawanago, Y Lee, K Kakushima, P Ahmet, K Tsutsui, A Nishiyama, ... 2011 Proceedings of the European Solid-State Device Research Conference …, 2011 | 11 | 2011 |
Polarity dependent breakdown of the high-κ∕ SiOx gate stack: A phenomenological explanation by scanning tunneling microscopy DS Ang, YC Ong, SJ O’Shea, KL Pey, CH Tung, T Kawanago, ... Applied Physics Letters 92 (19), 2008 | 11 | 2008 |
Normally-off sputtered-MoS2 nMISFETs with TiN top-gate electrode all defined by optical lithography for chip-level integration K Matsuura, M Hamada, T Hamada, H Tanigawa, T Sakamoto, A Hori, ... Japanese Journal of Applied Physics 59 (8), 080906, 2020 | 9 | 2020 |
Transfer printing of Al2O3 gate dielectric for fabrication of top-gate MoS2 FET T Kawanago, T Oba, S Oda Applied Physics Express 12 (2), 026501, 2019 | 9 | 2019 |