A true random number generator using RTN noise and a sigma delta converter T Figliolia, P Julián, G Tognetti, AG Andreou 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 17-20, 2016 | 24 | 2016 |
FPGA emulation of a spike-based, stochastic system for real-time image dewarping JL Molin, T Figliolia, K Sanni, I Doxas, A Andreou, R Etienne-Cummings 2015 IEEE 58th International Midwest Symposium on Circuits and Systems …, 2015 | 14 | 2015 |
A charge-based architecture for energy-efficient vector-vector multiplication in 65nm cmos K Sanni, T Figliolia, G Tognetti, P Pouliquen, A Andreou 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018 | 12 | 2018 |
Bio-inspired system architecture for energy efficient, bigdata computing with application to wide area motion imagery AG Andreou, T Figliolia, K Sanni, TS Murray, G Tognetti, DR Mendat, ... 2016 IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS), 1-6, 2016 | 12 | 2016 |
Acoustic micro‐Doppler signal processing with foveated electronic cochlea T Figliolia, TS Murray, AG Andreou Electronics Letters 51 (2), 132-134, 2015 | 7 | 2015 |
An FPGA multiprocessor architecture for Bayesian online change point detection using stochastic computation T Figliolia, AG Andreou Microprocessors and Microsystems 74, 102968, 2020 | 5 | 2020 |
7 TOPS/W Cellular Neural Network Processor Core for Intelligent Internet-of-Things M Villemur, P Julian, T Figliolia, AG Andreou IEEE Transactions on Circuits and Systems II: Express Briefs 67 (7), 1324-1328, 2019 | 5 | 2019 |
Neuromorphic Cellular Neural Network Processor for Intelligent Internet-of-Things M Villemur, P Julian, T Figliolia, A Andreou Circuits and Systems (ISCAS), 2018 IEEE International Symposium on, 2018 | 4 | 2018 |
Softmax calculation and architecture using a modified coordinate rotation digital computer (CORDIC) approach T Figliolia | 1 | 2022 |
The Conical-Fishbone Clock Tree: A Clock-Distribution Network for a Heterogeneous Chip Multiprocessor AI Chiplet T Figliolia, AG Andreou 2019 22nd Euromicro Conference on Digital System Design (DSD), 160-165, 2019 | 1 | 2019 |
2.5 D Chiplet Architecture for Embedded Processing of High Velocity Streaming Data T Figliolia Johns Hopkins University, 2018 | 1 | 2018 |
Neuromorphic Chiplet Architecture for Wide Area Motion Imagery Processing AG Andreou, T Figliolia, K Sanni, TS Murray, G Tognetti, DR Mendat, ... 2024 Argentine Conference on Electronics (CAE), 160-171, 2024 | | 2024 |
Hardware architecture and processing units for exact Bayesian inference with on-line learning and methods for same AG Andreou, T Figliolia US Patent 11,620,556, 2023 | | 2023 |
Representation of temporal coherence: CHAINS algorithm and FPGA implementation T Figliolia, AG Andreou 2013 47th Annual Conference on Information Sciences and Systems (CISS), 1-6, 2013 | | 2013 |
Auditory modulation of visual proto-object formation in a hierarchical auditory-visual saliency map T Figliolia, DR Mendat, AF Russell, TA Murray, E Nieburyk, ... 2013 47th Annual Conference on Information Sciences and Systems (CISS), 1-3, 2013 | | 2013 |