Design of approximate radix-4 booth multipliers for error-tolerant computing W Liu, L Qian, C Wang, H Jiang, J Han, F Lombardi IEEE Transactions on computers 66 (8), 1435-1441, 2017 | 285 | 2017 |
A review, classification, and comparative evaluation of approximate arithmetic circuits H Jiang, C Liu, L Liu, F Lombardi, J Han ACM Journal on Emerging Technologies in Computing Systems (JETC) 13 (4), 1-34, 2017 | 260 | 2017 |
Approximate radix-8 booth multipliers for low-power and high-performance operation H Jiang, J Han, F Qiao, F Lombardi IEEE Transactions on Computers 65 (8), 2638-2644, 2015 | 229 | 2015 |
A comparative review and evaluation of approximate adders H Jiang, J Han, F Lombardi Proceedings of the 25th edition on Great Lakes Symposium on VLSI, 343-348, 2015 | 220 | 2015 |
Approximate arithmetic circuits: A survey, characterization, and recent applications H Jiang, FJH Santiago, H Mo, L Liu, J Han Proceedings of the IEEE 108 (12), 2108-2135, 2020 | 215 | 2020 |
Low-power approximate multipliers using encoded partial products and approximate compressors MS Ansari, H Jiang, BF Cockburn, J Han IEEE journal on emerging and selected topics in circuits and systems 8 (3 …, 2018 | 177 | 2018 |
A comparative evaluation of approximate multipliers H Jiang, C Liu, N Maheshwari, F Lombardi, J Han 2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH …, 2016 | 97 | 2016 |
Low-power approximate unsigned multipliers with configurable error recovery H Jiang, C Liu, F Lombardi, J Han IEEE Transactions on Circuits and Systems I: Regular Papers 66 (1), 189-202, 2018 | 89 | 2018 |
A high-performance and energy-efficient FIR adaptive filter using approximate distributed arithmetic circuits H Jiang, L Liu, PP Jonker, DG Elliott, F Lombardi, J Han IEEE Transactions on Circuits and Systems I: Regular Papers 66 (1), 313-326, 2018 | 64 | 2018 |
Majority-based spin-CMOS primitives for approximate computing S Angizi, H Jiang, RF DeMara, J Han, D Fan IEEE Transactions on Nanotechnology 17 (4), 795-806, 2018 | 55 | 2018 |
Scalable construction of approximate multipliers with formally guaranteed worst case error V Mrazek, Z Vasicek, L Sekanina, H Jiang, J Han IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26 (11 …, 2018 | 51 | 2018 |
Low-power unsigned divider and square root circuit designs using adaptive approximation H Jiang, F Lombardi, J Han IEEE Transactions on Computers 68 (11), 1635-1646, 2019 | 36 | 2019 |
Gradient descent using stochastic circuits for efficient training of learning machines S Liu, H Jiang, L Liu, J Han IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 36 | 2018 |
Adaptive approximation in arithmetic circuits: A low-power unsigned divider design H Jiang, L Liu, F Lombardi, J Han 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2018 | 36 | 2018 |
Approximate arithmetic circuits: Design and evaluation H Jiang, L Liu, F Lombardi, J Han Approximate Circuits: Methodologies and CAD, 67-98, 2019 | 25 | 2019 |
Non-volatile approximate arithmetic circuits using scalable hybrid spin-CMOS majority gates H Jiang, S Angizi, D Fan, J Han, L Liu IEEE Transactions on Circuits and Systems I: Regular Papers 68 (3), 1217-1230, 2021 | 24 | 2021 |
Design of majority logic-based approximate booth multipliers for error-tolerant applications T Zhang, H Jiang, H Mo, W Liu, F Lombardi, L Liu, J Han IEEE Transactions on Nanotechnology 21, 81-89, 2022 | 20 | 2022 |
Characterizing approximate adders and multipliers optimized under different design constraints H Jiang, FJH Santiago, MS Ansari, L Liu, BF Cockburn, F Lombardi, J Han Proceedings of the 2019 on great lakes symposium on VLSI, 393-398, 2019 | 20 | 2019 |
Upward packet popup for deadlock freedom in modular chiplet-based systems Y Wu, L Wang, X Wang, J Han, J Zhu, H Jiang, S Yin, S Wei, L Liu 2022 IEEE International Symposium on High-Performance Computer Architecture …, 2022 | 13 | 2022 |
A logarithmic floating-point multiplier for the efficient training of neural networks Z Niu, H Jiang, MS Ansari, BF Cockburn, L Liu, J Han Proceedings of the 2021 on Great Lakes Symposium on VLSI, 65-70, 2021 | 12 | 2021 |