Suivre
Sangyeob Kim
Titre
Citée par
Citée par
Année
UNPU: An energy-efficient deep neural network accelerator with fully variable weight bit precision
J Lee, C Kim, S Kang, D Shin, S Kim, HJ Yoo
IEEE Journal of Solid-State Circuits 54 (1), 173-185, 2018
3032018
UNPU: A 50.6 TOPS/W unified deep neural network accelerator with 1b-to-16b fully-variable weight bit-precision
J Lee, C Kim, S Kang, D Shin, S Kim, HJ Yoo
2018 IEEE International Solid-State Circuits Conference-(ISSCC), 218-220, 2018
2842018
7.4 GANPU: A 135TFLOPS/W multi-DNN training processor for GANs with speculative dual-sparsity exploitation
S Kang, D Han, J Lee, D Im, S Kim, S Kim, HJ Yoo
2020 IEEE International Solid-State Circuits Conference-(ISSCC), 140-142, 2020
612020
A 13.7 TFLOPS/W floating-point DNN processor using heterogeneous computing architecture with exponent-computing-in-memory
J Lee, J Kim, W Jo, S Kim, S Kim, J Lee, HJ Yoo
2021 Symposium on VLSI Circuits, 1-2, 2021
322021
GANPU: An energy-efficient multi-DNN training processor for GANs with speculative dual-sparsity exploitation
S Kang, D Han, J Lee, D Im, S Kim, S Kim, J Ryu, HJ Yoo
IEEE Journal of Solid-State Circuits 56 (9), 2845-2857, 2021
292021
A power-efficient CNN accelerator with similar feature skipping for face recognition in mobile devices
S Kim, J Lee, S Kang, J Lee, HJ Yoo
IEEE Transactions on Circuits and Systems I: Regular Papers 67 (4), 1181-1193, 2020
272020
A 146.52 TOPS/W deep-neural-network learning processor with stochastic coarse-fine pruning and adaptive input/output/weight skipping
S Kim, J Lee, S Kang, J Lee, HJ Yoo
2020 IEEE Symposium on VLSI Circuits, 1-2, 2020
242020
Neuro-cim: A 310.4 tops/w neuromorphic computing-in-memory processor with low wl/bl activity and digital-analog mixed-mode neuron firing
S Kim, S Kim, S Um, S Kim, K Kim, HJ Yoo
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2022
152022
Design of Sub-10-μW Sub-0.1% THD Sinusoidal Current Generator IC for Bio-Impedance Sensing
K Kim, S Kim, HJ Yoo
IEEE Journal of Solid-State Circuits 57 (2), 586-595, 2021
152021
PNPU: An energy-efficient deep-neural-network learning processor with stochastic coarse–fine level weight pruning and adaptive input/output/weight zero skipping
S Kim, J Lee, S Kang, J Lee, W Jo, HJ Yoo
IEEE Solid-State Circuits Letters 4, 22-25, 2020
132020
OmniDRL: A 29.3 TFLOPS/W deep reinforcement learning processor with dualmode weight compression and on-chip sparse weight transposer
J Lee, S Kim, S Kim, W Jo, D Han, J Lee, HJ Yoo
2021 Symposium on VLSI Circuits, 1-2, 2021
122021
C-DNN: A 24.5-85.8 TOPS/W complementary-deep-neural-network processor with heterogeneous CNN/SNN core architecture and forward-gradient-based sparsity generation
S Kim, S Kim, S Hong, S Kim, D Han, HJ Yoo
2023 IEEE International Solid-State Circuits Conference (ISSCC), 334-336, 2023
112023
A 64.1 mW accurate real-time visual object tracking processor with spatial early stopping on siamese network
S Kim, S Kim, S Kim, D Han, HJ Yoo
IEEE Transactions on Circuits and Systems II: Express Briefs 68 (5), 1675-1679, 2021
112021
Gst: Group-sparse training for accelerating deep reinforcement learning
J Lee, S Kim, S Kim, W Jo, HJ Yoo
arXiv preprint arXiv:2101.09650, 2021
102021
Tsunami: Triple sparsity-aware ultra energy-efficient neural network training accelerator with multi-modal iterative pruning
S Kim, J Lee, S Kang, D Han, W Jo, HJ Yoo
IEEE Transactions on Circuits and Systems I: Regular Papers 69 (4), 1494-1506, 2022
92022
An energy-efficient GAN accelerator with on-chip training for domain-specific optimization
S Kim, S Kang, D Han, S Kim, S Kim, HJ Yoo
IEEE Journal of Solid-State Circuits 56 (10), 2968-2980, 2021
92021
ECIM: exponent computing in memory for an energy-efficient heterogeneous floating-point DNN training processor
J Lee, J Kim, W Jo, S Kim, S Kim, HJ Yoo
IEEE Micro 42 (1), 99-107, 2021
92021
A low-power graph convolutional network processor with sparse grouping for 3d point cloud semantic segmentation in mobile devices
S Kim, S Kim, J Lee, HJ Yoo
IEEE Transactions on Circuits and Systems I: Regular Papers 69 (4), 1507-1518, 2022
82022
16.5 dynaplasia: An edram in-memory-computing-based reconfigurable spatial accelerator with triple-mode cell for dynamic resource switching
S Kim, Z Li, S Um, W Jo, S Ha, J Lee, S Kim, D Han, HJ Yoo
2023 IEEE International Solid-State Circuits Conference (ISSCC), 256-258, 2023
72023
A 15.2 TOPS/W CNN accelerator with similar feature skipping for face recognition in mobile devices
S Kim, J Lee, S Kang, J Lee, HJ Yoo
2019 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2019
62019
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