Eduardo Boemo
Cited by
Cited by
Design of high-speed multiplierless filters using a nonrecursive signed common subexpression algorithm
M Martínez-Peiró, EI Boemo, L Wanhammar
IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 2002
Dynamically inserting, operating, and eliminating thermal sensors of FPGA-based systems
S Lopez-Buedo, J Garrido, EI Boemo
IEEE Transactions on components and packaging technologies 25 (4), 561-566, 2002
Thermal monitoring on FPGAs using ring-oscillators
E Boemo, S López-Buedo
International Workshop on Field Programmable Logic and Applications, 69-78, 1997
Thermal testing on reconfigurable computers
S Lopez-Buedo, J Garrido, E Boemo
IEEE Design & Test of Computers 17 (1), 84-91, 2000
Locomotion capabilities of a modular robot with eight pitch-yaw-connecting modules
J Gonzalez-Gomez, H Zhang, E Boemo, J Zhang
9th international conference on climbing and walking robots 1, 2, 2006
A study about FPGA-based digital filters
J Valls, MM Peiró, T Sansaloni, E Boemo
1998 IEEE Workshop on Signal Processing Systems. SIPS 98. Design and …, 1998
Ring oscillators as thermal sensors in FPGAs: Experiments in low voltage
JJL Franco, E Boemo, E Castillo, L Parrilla
2010 VI Southern Programmable Logic Conference (SPL), 133-137, 2010
Low-power FSMs in FPGA: Encoding alternatives
G Sutter, E Todorovich, S López-Buedo, E Boemo
Integrated Circuit Design. Power and Timing Modeling, Optimization and …, 2002
Locomotion principles of 1D topology pitch and pitch-yaw-connecting modular robots
J Gonzalez-Gomez, H Zhang, E Boemo
INTECH Open Access Publisher, 2007
Making visible the thermal behaviour of embedded microprocessors on FPGAs: a progress report
S Lopez-Buedo, E Boemo
Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field …, 2004
Clock gating and clock enable for FPGA power reduction
JP Oliver, J Curto, D Bouvier, M Ramos, E Boemo
2012 VIII Southern Conference on Programmable Logic, 1-5, 2012
Some notes on power management on FPGA-based systems
EI Boemo, GG de Rivera, S López-Buedo, JM Meneses
Field-Programmable Logic and Applications: 5th International Workshop, FPL …, 1995
Locomotion of a Modular Worm-like Robot using a FPGA-based embedded MicroBlaze Soft-processor
MA Armada, P de González Santos, J Gonzalez-Gomez, E Aguayo, ...
Climbing and Walking Robots: Proceedings of the 7th International Conference …, 2005
Some experiments about wave pipelining on FPGA's
EI Boemo, S López-Buedo, JM Meneses
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 6 (2), 232-237, 1998
Experiments in low power FPGA design
G Sutter, E Boemo
Latin American applied research 37 (1), 99-104, 2007
Rapid prototyping of a self-timed ALU with FPGAs
S Ortega-Cisneros, JJ Raygoza-Panduro, JS Muro, E Boemo
2005 International Conference on Reconfigurable Computing and FPGAs …, 2005
FSM decomposition for low power in FPGA
G Sutter, E Todorovich, S Lopez-Buedo, E Boemo
Field-Programmable Logic and Applications: Reconfigurable Computing Is Going …, 2002
A comparison between lattice, cascade and direct form FIR filter structures by using a FPGA bit-serial distributed arithmetic implementation
M Martínez-Peiró, J Valls, T Sansaloni, AP Pascual, EI Boemo
ICECS'99. Proceedings of ICECS'99. 6th IEEE International Conference on …, 1999
Wave pipelines via look-up tables
EI Boemo, S Lopez-Buedo, JM Meneses
1996 IEEE International Symposium on Circuits and Systems. Circuits and …, 1996
Power estimations vs. power measurements in Cyclone III devices
JP Oliver, E Boemo
2011 VII southern conference on Programmable Logic (SPL), 87-90, 2011
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