| Hardware architecture and software stack for PIM based on commercial DRAM technology: Industrial product S Lee, S Kang, J Lee, H Kim, E Lee, S Seo, H Yoon, S Lee, K Lim, H Shin, ... 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture …, 2021 | 228 | 2021 |
| 25.4 a 20nm 6gb function-in-memory dram, based on hbm2 with a 1.2 tflops programmable computing unit using bank-level parallelism, for machine learning applications YC Kwon, SH Lee, J Lee, SH Kwon, JM Ryu, JP Son, O Seongil, HS Yu, ... 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 350-352, 2021 | 184 | 2021 |
| Architecting to achieve a billion requests per second throughput on a single key-value store server platform S Li, H Lim, VW Lee, JH Ahn, A Kalia, M Kaminsky, DG Andersen, ... Proceedings of the 42nd Annual International Symposium on Computer …, 2015 | 167 | 2015 |
| TWiCe: Preventing row-hammering by exploiting time window counters E Lee, I Kang, S Lee, GE Suh, JH Ahn Proceedings of the 46th International Symposium on Computer Architecture …, 2019 | 151 | 2019 |
| Near-memory processing in action: Accelerating personalized recommendation with axdimm L Ke, X Zhang, J So, JG Lee, SH Kang, S Lee, S Han, YG Cho, JH Kim, ... IEEE Micro 42 (1), 116-127, 2021 | 103 | 2021 |
| CiDRA: A cache-inspired DRAM resilience architecture YH Son, S Lee, O Seongil, S Kwon, NS Kim, JH Ahn 2015 IEEE 21st International Symposium on High Performance Computer …, 2015 | 60 | 2015 |
| Aquabolt-XL: Samsung HBM2-PIM with in-memory processing for ML accelerators and beyond JH Kim, S Kang, S Lee, H Kim, W Song, Y Ro, S Lee, D Wang, H Shin, ... 2021 IEEE Hot Chips 33 Symposium (HCS), 1-26, 2021 | 48 | 2021 |
| MViD: Sparse matrix-vector multiplication in mobile DRAM for accelerating recurrent neural networks B Kim, J Chung, E Lee, W Jung, S Lee, J Choi, J Park, M Wi, S Lee, ... IEEE Transactions on Computers 69 (7), 955-967, 2020 | 38 | 2020 |
| TWiCe: Time window counter based row refresh to prevent row-hammering E Lee, S Lee, GE Suh, JH Ahn IEEE Computer Architecture Letters 17 (1), 96-99, 2017 | 33 | 2017 |
| Leveraging power-performance relationship of energy-efficient modern DRAM devices S Lee, H Cho, YH Son, Y Ro, NS Kim, JH Ahn IEEE Access 6, 31387-31398, 2018 | 30 | 2018 |
| Aquabolt-XL HBM2-PIM, LPDDR5-PIM with in-memory processing, and AXDIMM with acceleration buffer JH Kim, SH Kang, S Lee, H Kim, Y Ro, S Lee, D Wang, J Choi, J So, ... IEEE Micro 42 (3), 20-30, 2022 | 29 | 2022 |
| A 16 GB 1024 GB/s HBM3 DRAM with source-synchronized bus design and on-die error control scheme for enhanced RAS features Y Ryu, SG Ahn, JH Lee, J Park, YK Kim, H Kim, YG Song, HW Cho, S Cho, ... IEEE Journal of Solid-State Circuits 58 (4), 1051-1061, 2023 | 20 | 2023 |
| The breakthrough memory solutions for improved performance on llm inference B Kim, S Cha, S Park, J Lee, S Lee, S Kang, J So, K Kim, J Jung, JG Lee, ... IEEE Micro, 2024 | 13 | 2024 |
| An FPGA-based RNN-T Inference Accelerator with PIM-HBM S Kang, S Lee, B Kim, H Kim, K Sohn, NS Kim, E Lee Proceedings of the 2022 ACM/SIGDA International Symposium on Field …, 2022 | 13 | 2022 |
| Samsung pim/pnm for transfmer based ai: Energy efficiency on pim/pnm cluster JH Kim, Y Ro, J So, S Lee, S Kang, YG Cho, H Kim, B Kim, K Kim, S Park, ... 2023 IEEE Hot Chips 35 Symposium (HCS), 1-31, 2023 | 9 | 2023 |
| Full-stack architecting to achieve a billion-requests-per-second throughput on a single key-value store server platform S Li, H Lim, VW Lee, JH Ahn, A Kalia, M Kaminsky, DG Andersen, S O, ... ACM Transactions on Computer Systems (TOCS) 34 (2), 1-30, 2016 | 9 | 2016 |
| Achieving one billion key-value requests per second on a single server S Li, H Lim, VW Lee, JH Ahn, A Kalia, M Kaminsky, DG Andersen, S Lee, ... IEEE Micro 36 (3), 94-104, 2016 | 8 | 2016 |
| A 16 GB 1024 GB/s HBM3 DRAM with on-die error control scheme for enhanced RAS features Y Ryu, YC Kwon, JH Lee, SG Ahn, J Park, K Lee, YH Choi, HW Cho, ... 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2022 | 7 | 2022 |
| 3D-Xpath: High-density managed dram architecture with cost-effective alternative paths for memory transactions S Lee, K Lee, M Sung, M Alian, C Kim, W Cho, R Oh, S O, JH Ahn, NS Kim Proceedings of the 27th International Conference on Parallel Architectures …, 2018 | 7 | 2018 |
| Understanding power-performance relationship of energy-efficient modern DRAM devices S Lee, Y Ro, YH Son, H Cho, NS Kim, JH Ahn 2017 IEEE International Symposium on Workload Characterization (IISWC), 110-111, 2017 | 5 | 2017 |
Jung Ho AhnSeoul National UniversityVerified email at snu.ac.kr
