Peter Jamieson

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Jonathan RoseProfessor of Electrical and Computer Engineering, University of TorontoVerified email at ece.utoronto.ca
Jason LuuUniversity of TorontoVerified email at eecg.utoronto.ca
Wayne LukProfessor of Computer Engineering, Imperial College LondonVerified email at imperial.ac.uk
Lesley ShannonProfessor, School of Engineering Science, Simon Fraser UniversityVerified email at ensc.sfu.ca
Kenneth B KentUniversity of New BrunswickVerified email at unb.ca
Ricardo FerreiraDepartamento de Informática, Universidade Federal ViçosaVerified email at ufv.br
Jose Augusto M. NacifProfessor de Ciência da Computação, Universidade Federal de ViçosaVerified email at ufv.br
Lindsay GraceKnight Chair Interactive Media, University of MiamiVerified email at miami.edu
Tero RissaGoogleVerified email at doc.ic.ac.uk
Peter Y K CheungProfessor of Digital Systems, Imperial College LondonVerified email at imperial.ac.uk
Michael CaneschePhD student in Computer Science at Universidade Federal de Minas Gerais (UFMG)Verified email at dcc.ufmg.br
Jason AndersonProfessor of Electrical and Computer Engineering, University of TorontoVerified email at eecg.toronto.edu
Jeffrey GoedersBrigham Young UniversityVerified email at byu.edu
Steve WiltonElectrical and Computer Engineering, University of British Columbia, V6T 1Z4Verified email at ece.ubc.ca
Westerley CarvalhoMSc student in Computer ScienceVerified email at ufv.br
Angelos BilasProfessor of Computer Science, University of Crete & FORTH, GreeceVerified email at csd.uoc.gr
Frank Sill Torres; Frank Sill; FS Torres;...German Aerospace Center (DLR) / Institute for the Protection of Maritime InfrastructuresVerified email at ufmg.br
George ConstantinidesImperial College LondonVerified email at ic.ac.uk
John J. HallTrimble PPMVerified email at rams.colostate.edu
Tyler McGrewGraduate Researcher, Virginia TechVerified email at vt.edu

Peter Jamieson

Associate Professor of Computer Engineering, Miami University

Verified email at miamioh.edu - Homepage

FPGAs Genetic Algorithms Agent Based Simulation Serious Games Education


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The VTR project: architecture and CAD for FPGAs from verilog to routing J Rose, J Luu, CW Yu, O Densmore, J Goeders, A Somerville, KB Kent, ... Proceedings of the ACM/SIGDA international symposium on Field Programmable …, 2012	354	2012
VPR 5.0: FPGA CAD and architecture exploration tools with single-driver routing, heterogeneity and process scaling J Luu, I Kuon, P Jamieson, T Campbell, A Ye, WM Fang, K Kent, J Rose ACM Transactions on Reconfigurable Technology and Systems (TRETS) 4 (4), 1-23, 2011	339	2011
Odin ii-an open-source verilog hdl synthesis tool for cad research P Jamieson, KB Kent, F Gharibian, L Shannon 2010 18th IEEE Annual International Symposium on Field-Programmable Custom …, 2010	208	2010
Arduino for Teaching Embedded Systems. Are Computer Scientists and Engineering Educators Missing the Boat? P Jamieson	160	2011
More Missing the Boat - Arduino, Raspberry Pi, and Small Prototyping Boards and Engineering Education Needs Them P Jamieson, J Herdtner 45th Frontiers in Education Conference, 2015	106	2015
An energy and power consumption analysis of FPGA routing architectures P Jamieson, W Luk, SJE Wilton, GA Constantinides 2009 International Conference on Field-Programmable Technology, 324-327, 2009	81	2009
Enhancing the area efficiency of fpgas with hard circuits using shadow clusters PA Jamieson, J Rose IEEE transactions on very large scale integration (VLSI) systems 18 (12 …, 2009	64	2009
Enhancing the area efficiency of fpgas with hard circuits using shadow clusters PA Jamieson, J Rose IEEE transactions on very large scale integration (VLSI) systems 18 (12 …, 2009	64	2009
A verilog RTL synthesis tool for heterogeneous FPGAs P Jamieson, J Rose International Conference on Field Programmable Logic and Applications, 2005 …, 2005	51	2005
Harnessing Human Computation Cycles for the FPGA Placement Problem. L Terry, V Roitch, S Tufail, K Singh, O Taraq, W Luk, P Jamieson ERSA 9, 188-194, 2009	27	2009
Using Modern Graph Analysis Techniques on Mind Maps to Help Quantify Learning PA Jamieson Frontiers in Education, 2012	25	2012
Revisiting Genetic Algorithms for the FPGA Placement Problem. P Jamieson GEM, 16-22, 2010	21	2010
Ready: A fine-grained multithreading overlay framework for modern cpu-fpga dataflow applications LBD Silva, R Ferreira, M Canesche, MM Menezes, MD Vieira, J Penha, ... ACM Transactions on Embedded Computing Systems (TECS) 18 (5s), 1-20, 2019	18	2019
Benchmarking reconfigurable architectures in the mobile domain P Jamieson, T Becker, W Luk, PYK Cheung, T Rissa, T Pitkanen 2009 17th IEEE Symposium on Field Programmable Custom Computing Machines …, 2009	15	2009
Framework and tools for undergraduates designing RISC-V processors on an FPGA in computer architecture education T McGrew, E Schonauer, P Jamieson 2019 International Conference on Computational Science and Computational …, 2019	14	2019
Benchmarking and evaluating reconfigurable architectures targeting the mobile domain P Jamieson, T Becker, PYK Cheung, W Luk, T Rissa, T Pitkänen ACM Transactions on Design Automation of Electronic Systems (TODAES) 15 (2 …, 2010	14	2010
Mapping multiplexers onto hard multipliers in FPGAs P Jamieson, J Rose The 3rd International IEEE-NEWCAS Conference, 2005., 323-326, 2005	14	2005
Traversal: A fast and adaptive graph-based placement and routing for cgras M Canesche, M Menezes, W Carvalho, FS Torres, P Jamieson, JA Nacif, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020	13	2020
Architecting hard crossbars on FPGAs and increasing their area efficiency with shadow clusters P Jamieson, J Rose 2007 International Conference on Field-Programmable Technology, 57-64, 2007	13	2007
Cables: Thread control and memory management extensions for shared virtual memory clusters P Jamieson, A Bilas Proceedings Eighth International Symposium on High Performance Computer …, 2002	11	2002

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