| Scheduling optimization in multicore multithreaded microprocessors through dynamic modeling L Weng, C Liu, JL Gaudiot Proceedings of the ACM International Conference on Computing Frontiers, 1-10, 2013 | 14 | 2013 |
| On better performance from scheduling threads according to resource demands in MMMP L Weng, C Liu 2010 39th International Conference on Parallel Processing Workshops, 339-345, 2010 | 13 | 2010 |
| Cooperative virtual machine scheduling on multi-core multi-threading systems—a feasibility study D Arteaga, M Zhao, C Liu, P Thanarungroj, L Weng Workshop on Micro Architectural Support for Virtualization, Data Center …, 2010 | 6 | 2010 |
| A resource utilization based instruction fetch policy for SMT processors L Weng, C Liu Microprocessors and Microsystems 39 (1), 1-10, 2015 | 4 | 2015 |
| PCOUNT: a power aware fetch policy in simultaneous multithreading processors L Weng, G Quan, C Liu 2011 International Green Computing Conference and Workshops, 1-6, 2011 | 3 | 2011 |
| Hardware-aided Monitoring of L1 and L2 D-Cache Misses in SMT L Weng, C Liu | 3 | 2011 |
| Fetching according to the evaluated l2 cache misses by OLS regression in SMT architecture L Weng, C Liu Poster Session in the Sixteenth International Conference on Architectural …, 2011 | 3 | 2011 |
| A hardware and software integrated approach for adaptive thread management in multicore multithreaded microprocessors L Weng | 1 | 2012 |
| Regression-based Algorithm to Predict Data-misses L Weng, C Liu | | 2011 |
| Intelligent controller with cache for critical infrastructures L Weng, X Niu, C Liu, N Pissinou IET Digital Library, 2010 | | 2010 |
| RaPD: An Adaptive Fetch Policy Employing OLS Regression of D-Cache Miss Rates L Weng, C Liu | | |
| Hardware-aided Monitoring of L1 and L2 D-Cache Misses in SMT Environment L Weng, C Liu | | |
