Folgen
Endri Bezati
Endri Bezati
Computing System Laboratory, Huawei Technologies Zurich
Bestätigte E-Mail-Adresse bei epfl.ch
Titel
Zitiert von
Zitiert von
Jahr
Methods to explore design space for MPEG RMC codec specifications
S Casale-Brunet, A Elguindy, E Bezati, R Thavot, G Roquier, M Mattavelli, ...
Signal Processing: Image Communication 28 (10), 1278-1294, 2013
542013
High-level synthesis of dataflow programs for signal processing systems
E Bezati, M Mattavelli, JW Janneck
2013 8th International Symposium on Image and Signal Processing and Analysis …, 2013
402013
High-level dataflow design of signal processing systems for reconfigurable and multicore heterogeneous platforms
E Bezati, R Thavot, G Roquier, M Mattavelli
Journal of real-time image processing 9 (1), 251-262, 2014
362014
High-level synthesis of dataflow programs for heterogeneous platforms: design flow tools and design space exploration
E Bezati
EPFL, 2015
34*2015
Synthesis and optimization of high-level stream programs
E Bezati, SC Brunet, M Mattavelli, JW Janneck
Proceedings of the 2013 Electronic System Level Synthesis Conference (ESLsyn …, 2013
292013
Clock-gating of streaming applications for energy efficient implementations on FPGAs
E Bezati, S Casale-Brunet, M Mattavelli, JW Janneck
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2016
282016
Partitioning and optimization of high level stream applications for multi clock domain architectures
SC Brunet, E Bezati, C Alberti, M Mattavelli, E Amaldi, JW Janneck
SiPS 2013 Proceedings, 177-182, 2013
282013
Rvc-cal dataflow implementations of mpeg avc/h. 264 cabac decoding
E Bezati, M Mattavelli, M Raulet
2010 Conference on Design and Architectures for Signal and Image Processing …, 2010
242010
Automated design flow for multi-functional dataflow-based platforms
C Sau, P Meloni, L Raffo, F Palumbo, E Bezati, S Casale-Brunet, ...
Journal of Signal Processing Systems 85, 143-165, 2016
232016
Synthesis and optimization of pipelines for HW implementations of dataflow programs
A Prihozhy, E Bezati, AAH Ab Rahman, M Mattavelli
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2015
232015
Hardware and software synthesis of heterogeneous systems from dataflow programs
G Roquier, E Bezati, M Mattavelli
Journal of Electrical and Computer Engineering 2012, 2-2, 2012
232012
Coarse grain clock gating of streaming applications in programmable logic implementations
E Bezati, SC Brunet, M Mattavelli, JW Janneck
Proceedings of the 2014 electronic system level synthesis conference (ESLsyn …, 2014
212014
Design space exploration strategies for FPGA implementation of signal processing systems using CAL dataflow program
AAH Ab Rahman, R Thavot, SC Brunet, E Bezati, M Mattavelli
Proceedings of the 2012 Conference on Design and Architectures for Signal …, 2012
212012
A unified hardware/software co-synthesis solution for signal processing systems
E Bezati, H Yviquel, M Raulet, M Mattavelli
Proceedings of the 2011 Conference on Design & Architectures for Signal …, 2011
212011
Pipeline synthesis and optimization from branched feedback dataflow programs
A Prihozhy, S Casale-Brunet, E Bezati, M Mattavelli
Journal of Signal Processing Systems 92 (10), 1091-1099, 2020
162020
Automated design flow for coarse-grained reconfigurable platforms: An RVC-CAL multi-standard decoder use-case
C Sau, L Raffo, F Palumbo, E Bezati, S Casale-Brunet, M Mattavelli
2014 International Conference on Embedded Computer Systems: Architectures …, 2014
162014
An heterogeneous compiler of dataflow programs for zynq platforms
E Bezati, S Casale-Brunet, R Mosqueron, M Mattavelli
ICASSP 2019-2019 IEEE International Conference on Acoustics, Speech and …, 2019
132019
Efficient scheduling policies for dynamic dataflow programs executed on multi-core
M Michalska, N Zufferey, J Boutellier, E Bezati, M Mattavelli
9th International Workshop on Programmability and Architectures for …, 2016
132016
High-precision performance estimation for the design space exploration of dynamic dataflow programs
M Michalska, S Casale-Brunet, E Bezati, M Mattavelli
IEEE Transactions on Multi-Scale Computing Systems 4 (2), 127-140, 2017
122017
Efficient Dynamic Optimisation Heuristics for Dataflow Pipelines
A Prihozhy, S Casale-Brunet, E Bezati, M Mattavelli
2018 IEEE International Workshop on Signal Processing Systems (SiPS), 1-6, 2018
112018
Das System kann den Vorgang jetzt nicht ausführen. Versuchen Sie es später erneut.
Artikel 1–20