A digital input controller for audio class-D amplifiers with 100W 0.004% THD+ N and 113dB DR T Ido, S Ishizuka, L Risbo, F Aoyagi, T Hamasaki 2006 IEEE International Solid State Circuits Conference-Digest of Technical …, 2006 | 37 | 2006 |
A 7.5 mW 101dB SNR low-power high-performance audio delta-sigma modulator utilizing opamp sharing technique D Kanemoto, T Ido, K Taniguchi 2011 International SoC Design Conference, 66-69, 2011 | 22 | 2011 |
Watch-dog circuit for quality guarantee with subthreshold MOSFET current T Hirose, R Yoshimura, T Ido, T Matsuoka, K Taniguchi IEICE transactions on electronics 87 (11), 1910-1914, 2004 | 22 | 2004 |
Signal processing for MEMS capacitive transducers JP Lesso, EPC Hardy, JT Deas, T Ido US Patent 9,716,945, 2017 | 21 | 2017 |
An area-efficient CMOS bandgap reference utilizing a switched-current technique BAI UK, S Okura, T Ido, K Taniguchi IEEE Transactions on Circuits and Systems II: Express Briefs 57 (10), 762-766, 2010 | 18 | 2010 |
Digital encoder and digital-to-analog converter using same S Ishizuka, T Ido US Patent 7,123,178, 2006 | 17 | 2006 |
Class D amplifier circuit JP Lesso, T Ido US Patent 9,628,040, 2017 | 15 | 2017 |
Class-D amplifier circuits JP Lesso, T Ido US Patent 9,473,087, 2016 | 14 | 2016 |
PWM driver and class D amplifier using same T Ido, S Ishizuka US Patent 7,557,744, 2009 | 12 | 2009 |
A novel third order delta sigma modulator with one opamp shared among three integrator stages D Kanemoto, T Ido, K Taniguchi IEICE Electronics Express 5 (24), 1088-1092, 2008 | 12 | 2008 |
A high dynamic range and low power consumption audio delta-sigma modulator with opamp sharing technique among three integrators D Kanemoto, T Ido, K Taniguchi IEICE transactions on electronics 95 (8), 1427-1433, 2012 | 6 | 2012 |
Pulse-width modulation T Ido US Patent 10,566,962, 2020 | 5 | 2020 |
Audio amplifiers JP Lesso, T Ido US Patent 10,432,151, 2019 | 5 | 2019 |
Crosstalk mitigation JP Lesso, T Ido US Patent 10,045,124, 2018 | 5 | 2018 |
Pop noise suppression technique S Ishizuka, T Ido, N Furuya, T Anzai US Patent 7,932,711, 2011 | 5 | 2011 |
Method and apparatus for forming transient response characteristics T Ido, S Ishizuka US Patent 7,215,271, 2007 | 5 | 2007 |
Watchdog circuit for product degradation monitor using subthreshold MOS current T Hirose, R Yoshimura, T Ido, T Matsuoka, K Taniguchi Proceedings of the International Conference on Solid State Devices and …, 2004 | 5 | 2004 |
A novel approach to implement summing function for feedforward Δ-Σ AD modulator J Wang, T Ido, T Matsuoka, K Taniguchi IEICE Electronics Express 5 (12), 457-463, 2008 | 4 | 2008 |
Signal processing for MEMS capacitive transducers JP Lesso, EPC Hardy, JT Deas, T Ido US Patent 10,070,223, 2018 | 3 | 2018 |
Weight level generating method and device utilizing plural weights at different time rates T Ido, S Ishizuka US Patent 7,623,055, 2009 | 3 | 2009 |