Reiner Hartenstein

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Juergen BeckerKarlsruhe Institute of TechnologyVerified email at kit.edu
Michael WeberProfessor, Ulm UniversityVerified email at uni-ulm.de
Mauricio Ayala RinconProfessor of Computer Science and Mathematics, Universidade de BrasiliaVerified email at unb.br
Carlos Humberto LlanosEng. Mecânica, Universidade de BrasíliaVerified email at unb.br
Wolfgang NebelProfessor Entwurf eingebetteter Hardware- / Softwaresysteme, Uni Oldenburg und OFFISVerified email at offis.de
Andre DeHonUniversity of PennsylvaniaVerified email at acm.org
David AndrewsUniversity of ArkansasVerified email at uark.edu
Krishna PalemKen and Audrey Kennedy Professor Verified email at rice.edu
Viktor K. PrasannaUniversity of Southern CaliforniaVerified email at usc.edu
Veljko MilutinovicUniversity of Belgrade in SerbiaVerified email at etf.rs
Wayne LukProfessor of Computer Engineering, Imperial College LondonVerified email at imperial.ac.uk
Lionel TORRESLIRMMVerified email at lirmm.fr
Peter Y K CheungProfessor of Digital Systems, Imperial College LondonVerified email at imperial.ac.uk
Massimo AnconaProfessor of Computer Science, University of GenoaVerified email at disi.unige.it
Sunil ShuklaIBM ResearchVerified email at us.ibm.com
Ricardo Augusto da Luz ReisUFRGSVerified email at inf.ufrgs.br
Jörg HenkelProfessor of Computer Science, Karlsruhe Institute of TechnologyVerified email at kit.edu
Peter AthanasEmeritus Professor of Electrical and Computer EngineeringVerified email at vt.edu
Adam PawlakSilesian University of Technology, Politechnika Śląska, Gliwice, PolandVerified email at polsl.pl
Petru ElesProfessor of Computer Systems, Linkoping UniversityVerified email at liu.se

Reiner Hartenstein

University of Kaiserslautern & KIT Karlsruhe

Verified email at hartenstein.de - Homepage

FPGA Xputer Reconfigurable Computing Power-efficient Computing Computer Architecture


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A decade of reconfigurable computing: a visionary retrospective R Hartenstein Proceedings design, automation and test in Europe. Conference and exhibition …, 2001	938	2001
Introduction to reconfigurable computing: architectures, algorithms, and applications C Bobda, R Hartenstein Springer 1 (1.5), 2007	332	2007
Coarse grain reconfigurable architectures R Hartenstein Proceedings of the ASP-DAC 2001. Asia and South Pacific Design Automation …, 2001	302	2001
Seeking solutions in configurable computing WH Mangione-Smith, B Hutchings, D Andrews, A DeHon, C Ebeling, ... Computer 30 (12), 38-43, 1997	256	1997
A datapath synthesis system for the reconfigurable datapath architecture RW Hartenstein, R Kress Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair, 479-484, 1995	198	1995
KressArray Xplorer: A new CAD environment to optimize reconfigurable datapath array architectures R Hartenstein, M Herz, T Hoffmann, U Nageldinger Proceedings 2000. Design Automation Conference.(IEEE Cat. No. 00CH37106 …, 2000	135	2000
Parallelization in co-compilation for configurable accelerators-a host/accelerator partitioning compilation method J Becker, R Hartenstein, M Herz, U Nageldinger Proceedings of 1998 Asia and South Pacific Design Automation Conference, 23-33, 1998	109	1998
A new FPGA architecture for word-oriented datapaths RW Hartenstein, R Kress, H Reinig International Workshop on Field Programmable Logic and Applications, 144-155, 1994	109	1994
Configware and morphware going mainstream J Becker, R Hartenstein Journal of Systems Architecture 49 (4-6), 127-142, 2003	107	2003
Learning spatiotemporal T-junctions for occlusion detection N Apostoloff, A Fitzgibbon 2005 IEEE Computer Society Conference on Computer Vision and Pattern …, 2005	80	2005
A novel ASIC design approach based on a new machine paradigm RW Hartenstein, AG Hirschbiel, M Riedmuller, K Schmidt, M Weber IEEE Journal of Solid-State Circuits 26 (7), 975-989, 1991	76	1991
Using the KressArray for reconfigurable computing RW Hartenstein, M Herz, T Hoffmann, U Nageldinger Configurable Computing: Technology and Applications 3526, 150-161, 1998	66	1998
Trends in reconfigurable logic and reconfigurable computing R Hartenstein 9th International Conference on Electronics, Circuits and Systems 2, 801-808, 2002	62	2002
Reconfigurable systems for sequence alignment and for general dynamic programming RP Jacobi, M Ayala-Rincón, LGA Carvalho, CH Llanos, RW Hartenstein Genetics and Molecular Research 4 (3), 543-552, 2005	57	2005
A reconfigurable data-driven ALU for Xputers RW Hartenstein, R Kress, H Reinig Proceedings of IEEE Workshop on FPGA's for Custom Computing Machines, 139-146, 1994	56	1994
A General Approach in System Design Integrating Reconfigurable Accelerators RW Hartenstein, J Becker, M Herz, U Nageldinger 1996 Proceedings. Eighth Annual IEEE International Conference on Innovative …, 1996	54	1996
A novel paradigm of parallel computation and its use to implement simple high-performance hardware RW Hartenstein, AG Hirschbiel, K Schmidt, M Weber Future Generation Computer Systems 7 (2-3), 181-198, 1992	52	1992
Data-procedural Languages for FPL-based Machines A Ast, J Becker, RW Hartenstein, R Kress, H Reinig, K Schmidt International Workshop on Field Programmable Logic and Applications, 183-191, 1994	51	1994
Fundamentals of structured hardware design: a design language approach at register transfer level R Hartenstein North-Holland, 1977	50	1977
Reconfigurable machine for applications in image and video compression RW Hartenstein, J Becker, R Kress, H Reinig, K Schmidt Advanced Image and Video Communications and Storage Technologies 2451, 9-20, 1995	49	1995

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