2D materials: roadmap to CMOS integration C Huyghebaert, T Schram, Q Smets, TK Agarwal, D Verreck, S Brems, ...
2018 IEEE International Electron Devices Meeting (IEDM), 22.1. 1-22.1. 4, 2018
95 2018 Polarity control in WSe2 double-gate transistors GV Resta, S Sutar, Y Balaji, D Lin, P Raghavan, I Radu, F Catthoor, ...
Scientific reports 6 (1), 29448, 2016
93 2016 Angle-dependent carrier transmission in graphene p–n junctions S Sutar, ES Comfort, J Liu, T Taniguchi, K Watanabe, JU Lee
Nano letters 12 (9), 4460-4464, 2012
91 2012 Controlled Sulfurization Process for the Synthesis of Large Area MoS2 Films and MoS2 /WS2 Heterostructures D Chiappe, I Asselberghs, S Sutar, S Iacovo, V Afanas' ev, A Stesmans, ...
Advanced Materials Interfaces 3 (4), 1500635, 2016
78 2016 Fully-depleted Ge interband tunnel transistor: Modeling and junction formation Q Zhang, S Sutar, T Kosel, A Seabaugh
Solid-State Electronics 53 (1), 30-35, 2009
76 2009 From the metal to the channel: A study of carrier injection through the metal/2D MoS 2 interface G Arutchelvan, CJL de la Rosa, P Matagne, S Sutar, I Radu, ...
Nanoscale 9 (30), 10869-10879, 2017
75 2017 Layer-controlled epitaxy of 2D semiconductors: bridging nanoscale phenomena to wafer-scale uniformity D Chiappe, J Ludwig, A Leonhardt, S El Kazzi, AN Mehta, T Nuytten, ...
Nanotechnology 29 (42), 425602, 2018
64 2018 Reconfigurable pn junction diodes and the photovoltaic effect in exfoliated MoS2 films S Sutar, P Agnihotri, E Comfort, T Taniguchi, K Watanabe, J Ung Lee
Applied Physics Letters 104 (12), 2014
60 2014 Manifestation of chiral tunneling at a tilted graphene RN Sajjad, S Sutar, JU Lee, AW Ghosh
Physical Review B 86 (15), 155412, 2012
52 2012 Challenges of wafer‐scale integration of 2D semiconductors for high‐performance transistor circuits T Schram, S Sutar, I Radu, I Asselberghs
Advanced Materials 34 (48), 2109796, 2022
38 2022 Impact of device scaling on the electrical properties of MoS2 field-effect transistors G Arutchelvan, Q Smets, D Verreck, Z Ahmed, A Gaur, S Sutar, J Jussot, ...
Scientific reports 11 (1), 6610, 2021
37 2021 Introducing 2D-FETs in device scaling roadmap using DTCO Z Ahmed, A Afzalian, T Schram, D Jang, D Verreck, Q Smets, ...
2020 IEEE International Electron Devices Meeting (IEDM), 22.5. 1-22.5. 4, 2020
35 2020 Dual gate synthetic WS2 MOSFETs with 120μS/μm Gm 2.7μF/cm2 capacitance and ambipolar channel D Lin, X Wu, D Cott, D Verreck, B Groven, S Sergeant, Q Smets, S Sutar, ...
2020 IEEE International Electron Devices Meeting (IEDM), 3.6. 1-3.6. 4, 2020
21 2020 Graphene based Van der Waals contacts on MoS2 field effect transistors V Mootheri, G Arutchelvan, S Banerjee, S Sutar, A Leonhardt, ME Boulon, ...
2D Materials 8 (1), 015003, 2020
19 2020 Modulating the resistivity of MoS2 through low energy phosphorus plasma implantation K Haynes, R Murray, Z Weinrich, X Zhao, D Chiappe, S Sutar, I Radu, ...
Applied Physics Letters 110 (26), 2017
17 2017 Sources of variability in scaled MoS2 FETs Q Smets, D Verreck, Y Shi, G Arutchelvan, B Groven, X Wu, S Sutar, ...
2020 IEEE International Electron Devices Meeting (IEDM), 3.1. 1-3.1. 4, 2020
16 2020 Bistable-body tunnel SRAM K Karda, S Sutar, JB Brockman, JJ Nahas, A Seabaugh
IEEE Transactions on nanotechnology 11 (6), 1067-1072, 2010
13 2010 2018 IEEE Int. Electron Devices Meeting (IEDM) C Huyghebaert, T Schram, Q Smets, TK Agarwal, D Verreck, S Brems, ...
IEEE, 2018
12 2018 One-transistor bistable-body tunnel SRAM K Karda, J Brockman, S Sutar, A Seabaugh, J Nahas
2009 IEEE International Conference on IC Design and Technology, 233-236, 2009
11 2009 Ultra-low Leakage IGZO-TFTs with Raised Source/Drain for Vt > 0 V and Ion > 30 µA/µm S Subhechha, N Rassoul, A Belmonte, H Hody, H Dekkers, MJ van Setten, ...
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2022
10 2022 