Devendra Rai
Devendra Rai
Swiss Federal Institute, Zurich
Bestätigte E-Mail-Adresse bei
Zitiert von
Zitiert von
Thermal covert channels on multi-core platforms
RJ Masti, D Rai, A Ranganathan, C Müller, L Thiele, S Capkun
24th USENIX security symposium (USENIX security 15), 865-880, 2015
Scenario-based design flow for mapping streaming applications onto on-chip many-core systems
L Schor, I Bacivarov, D Rai, H Yang, SH Kang, L Thiele
Proceedings of the 2012 international conference on Compilers, architectures …, 2012
Performance of delay-based Trojan detection techniques under parameter variations
D Rai, J Lach
2009 IEEE International Workshop on Hardware-Oriented Security and Trust, 58-65, 2009
Worst-case temperature analysis for real-time systems
D Rai, H Yang, I Bacivarov, JJ Chen, L Thiele
2011 Design, Automation & Test in Europe, 1-6, 2011
Power agnostic technique for efficient temperature estimation of multicore embedded systems
D Rai, H Yang, I Bacivarov, L Thiele
Proceedings of the 2012 international conference on Compilers, architectures …, 2012
Dynamic many-process applications on many-tile embedded systems and HPC clusters: The EURETILE programming environment and execution platforms
PS Paolucci, A Biagioni, LG Murillo, F Rousseau, L Schor, L Tosoratto, ...
Journal of Systems Architecture 69, 29-53, 2016
Model-based development of autosar-compliant applications: Exterior lights module case study
D Rai, TK Jestin, L Vitkin
SAE international journal of passenger cars-electronic and electrical …, 2008
EURETILE design flow: Dynamic and fault tolerant mapping of multiple applications onto many-tile systems
L Schor, I Bacivarov, LG Murillo, PS Paolucci, F Rousseau, A El Antably, ...
2014 IEEE International Symposium on Parallel and Distributed Processing …, 2014
A calibration based thermal modeling technique for complex multicore systems
D Rai, L Thiele
2015 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2015
Isolated execution on many-core architectures
RJ Masti, D Rai, C Marforio, S Capkun
Cryptology ePrint Archive, 2014
Real-time worst-case temperature analysis with temperature-dependent parameters
H Yang, I Bacivarov, D Rai, JJ Chen, L Thiele
Real-Time Systems 49, 730-762, 2013
Reliable and Efficient Execution of Multiple Streaming Applications on Intel’s SCC Processor
L Schor, D Rai, H Yang, I Bacivarov, L Thiele
Euro-Par 2013: Parallel Processing Workshops: BigDataCloud, DIHC, FedICI …, 2014
Distributed Stable States for Process Networks – Algorithm, Analysis, and Experiments on Intel SCC
NSLT Devendra Rai, Lars Schor
DAC 2013, 2013
Adaptation architectures cross levels
KS Yuanyuan Song, Devendra Rai
Proceedings of the 2nd international workshop on Ultra-large-scale software …, 2008
EURETILE D7. 3-Dynamic DAL benchmark coding, measurements on MPI version of DPSNN-STDP (distributed plastic spiking neural net) and improvements to other DAL codes
PS Paolucci, I Bacivarov, D Rai, L Schor, L Thiele, H Yang, E Pastorelli, ...
arXiv preprint arXiv:1408.4587, 2014
An efficient real time fault detection and tolerance framework validated on the intel SCC processor
D Rai, P Huang, N Stoimenov, L Thiele
Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014
Model based software development of non-preemptive multi-tasking system
D Rai, TK Jestin
2006 2nd IEEE/ASME International Conference on Mechatronics and Embedded …, 2006
Guest Editors’ Introduction: Cross-Layer Design of Cyber–Physical Systems
S Chakraborty, JJ Chen, A Annaswamy, D Rai
IEEE Design & Test 38 (5), 5-7, 2021
Designing Applications with Predictable Runtime Characteristics for the Baremetal Intel SCC
D Rai, L Schor, N Stoimenov, I Bacivarov, L Thiele
Euro-Par 2013: Parallel Processing Workshops: BigDataCloud, DIHC, FedICI …, 2014
DALipse–A Software Development Environment for the Distributed Application Layer
L Schor, E Herrsche, E Geiser, D Rai
Technical report, ETH Zurich, Computer Engineering and Networks Laboratory (TIK), 2013
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