| High-frequency scalable electrical model and analysis of a through silicon via (TSV) J Kim, JS Pak, J Cho, E Song, J Cho, H Kim, T Song, J Lee, H Lee, K Park, ... IEEE Transactions on Components, Packaging and Manufacturing Technology 1 (2 …, 2011 | 478 | 2011 |
| 3D-MAPS: 3D Massively Parallel Processor with Stacked Memory DH Kim, K Athikulwongse, MB Healy, MM Hossain, M Jung, I Khorosh, ... IEEE International Solid-State Circuits Conference, 188-190, 2012 | 218 | 2012 |
| Modeling and analysis of through-silicon via (TSV) noise coupling and suppression using a guard ring J Cho, E Song, K Yoon, JS Pak, J Kim, W Lee, T Song, K Kim, J Lee, ... IEEE Transactions on Components, Packaging and Manufacturing Technology 1 (2 …, 2011 | 184 | 2011 |
| Low frequency electromagnetic field reduction techniques for the on-line electric vehicle (OLEV) S Ahn, J Pak, T Song, H Lee, JG Byun, D Kang, CS Choi, E Kim, J Ryu, ... 2010 IEEE International Symposium on Electromagnetic Compatibility, 625-630, 2010 | 150 | 2010 |
| PDN impedance modeling and analysis of 3D TSV IC by using proposed P/G TSV array model based on separated P/G TSV and chip-PDN models JS Pak, J Kim, J Cho, K Kim, T Song, S Ahn, J Lee, H Lee, K Park, J Kim IEEE Transactions on Components, Packaging and Manufacturing Technology 1 (2 …, 2011 | 149 | 2011 |
| Full-chip TSV-to-TSV coupling analysis and optimization in 3D IC C Liu, T Song, J Cho, J Kim, J Kim, SK Lim Proceedings of the 48th Design Automation Conference, 783-788, 2011 | 119 | 2011 |
| Modeling and analysis of coupling between TSVs, metal, and RDL interconnects in TSV-based 3D IC with silicon interposer K Yoon, G Kim, W Lee, T Song, J Lee, H Lee, K Park, J Kim 2009 11th Electronics Packaging Technology Conference, 702-706, 2009 | 101 | 2009 |
| Design and analysis of 3D-MAPS (3D massively parallel processor with stacked memory) DH Kim, K Athikulwongse, MB Healy, MM Hossain, M Jung, I Khorosh, ... IEEE Transactions on Computers 64 (1), 112-125, 2013 | 77 | 2013 |
| Full-chip multiple TSV-to-TSV coupling extraction and optimization in 3D ICs T Song, C Liu, Y Peng, SK Lim Proceedings of the 50th Annual Design Automation Conference, 1-7, 2013 | 45 | 2013 |
| Silicon effect-aware full-chip extraction and mitigation of TSV-to-TSV coupling Y Peng, T Song, D Petranovic, SK Lim IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2014 | 42 | 2014 |
| Analysis of TSV-to-TSV coupling with high-impedance termination in 3D ICs T Song, C Liu, DH Kim, SK Lim, J Cho, J Kim, JS Pak, S Ahn, J Kim, ... 2011 12th International Symposium on Quality Electronic Design, 1-7, 2011 | 38 | 2011 |
| On enhancing power benefits in 3D ICs: Block folding and bonding styles perspective M Jung, T Song, Y Wan, Y Peng, SK Lim Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014 | 35 | 2014 |
| Full-chip signal integrity analysis and optimization of 3-D ICs T Song, C Liu, Y Peng, SK Lim IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (5 …, 2015 | 28 | 2015 |
| On accurate full-chip extraction and optimization of TSV-to-TSV coupling elements in 3D ICs Y Peng, T Song, D Petranovic, SK Lim 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 281-288, 2013 | 26 | 2013 |
| How to reduce power in 3D IC designs: A case study with OpenSPARC T2 core M Jung, T Song, Y Wan, YJ Lee, D Mohapatra, H Wang, G Taylor, ... Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 1-4, 2013 | 24 | 2013 |
| Through silicon via (TSV) shielding structures J Cho, J Kim, T Song, JS Pak, J Kim, H Lee, J Lee, K Park 19th Topical Meeting on Electrical Performance of Electronic Packaging and …, 2010 | 24 | 2010 |
| Opportunities and challenges in designing and utilizing vertical nanowire FET (V-NWFET) standard cells for beyond 5 nm T Song IEEE Transactions on Nanotechnology 18, 240-251, 2019 | 23 | 2019 |
| Signal integrity analysis and optimization for 3D ICs C Liu, T Song, SK Lim 2011 12th International Symposium on Quality Electronic Design, 1-8, 2011 | 22 | 2011 |
| Analysis of power distribution network in TSV-based 3D-IC K Kim, W Lee, J Kim, T Song, J Kim, JS Pak, J Kim, H Lee, Y Kwon, K Park 19th Topical Meeting on Electrical Performance of Electronic Packaging and …, 2010 | 21 | 2010 |
| I/O power estimation and analysis of high-speed channels in through-silicon via (TSV)-based 3D IC J Kim, J Cho, JS Pak, T Song, J Kim, H Lee, J Lee, K Park 19th Topical Meeting on Electrical Performance of Electronic Packaging and …, 2010 | 21 | 2010 |
