| Formal verification of high-level synthesis Y Herklotz, JD Pollard, N Ramanathan, J Wickerson Proceedings of the ACM on Programming Languages 5 (OOPSLA), 1-30, 2021 | 32 | 2021 |
| An empirical study of the reliability of high-level synthesis tools Y Herklotz, Z Du, N Ramanathan, J Wickerson 2021 IEEE 29th Annual International Symposium on Field-Programmable Custom …, 2021 | 25* | 2021 |
| Finding and understanding bugs in FPGA synthesis tools Y Herklotz, J Wickerson Proceedings of the 2020 ACM/SIGDA International Symposium on Field …, 2020 | 24 | 2020 |
| Mechanised semantics for gated static single assignment Y Herklotz, D Demange, S Blazy Proceedings of the 12th ACM SIGPLAN International Conference on Certified …, 2023 | 7 | 2023 |
| High-level synthesis tools should be proven correct Y Herklotz, J Wickerson Workshop on Languages, Tools, and Techniques for Accelerator Design (LATTE), 2021 | 4 | 2021 |
| Resource Sharing for Verified High-Level Synthesis M Pardalos, Y Herklotz, J Wickerson 2022 IEEE 30th Annual International Symposium on Field-Programmable Custom …, 2022 | 2 | 2022 |
| Hyperblock Scheduling for Verified High-Level Synthesis Y Herklotz, J Wickerson Proc. of the ACM on Programming Languages 8 (PLDI), 1-25, 2024 | | 2024 |
| Formal Verification of High-Level Synthesis YH Grave Imperial College London, 2024 | | 2024 |
| GSA to HDL: Towards principled generation of dynamically scheduled circuits A Rajagopal, DA Vink, J Cheng, Y Herklotz arXiv preprint arXiv:2308.11048, 2023 | | 2023 |
| On Formally Verifying High-Level Synthesis Y Herklotz | | 2023 |
| Verismith: FPGA’20 Artifact Y Herklotz, J Wickerson | | 2019 |
| PLDI: G: Formal Verification of High-Level Synthesis Y Herklotz | | |
John WickersonImperial College LondonVerified email at imperial.ac.uk
