Serge Ecoffey
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In‐Memory Vector‐Matrix Multiplication in Monolithic Complementary Metal–Oxide–Semiconductor‐Memristor Integrated Circuits: Design Choices, Challenges, and Perspectives
A Amirsoleimani, F Alibart, V Yon, J Xu, MR Pazhouhandeh, S Ecoffey, ...
Advanced Intelligent Systems 2 (11), 2000115, 2020
Selective palladium electrochemical deposition onto AFM-scratched silicon surfaces
L Santinacci, T Djenizian, H Hildebrand, S Ecoffey, H Mokdad, ...
Electrochimica acta 48 (20-22), 3123-3130, 2003
Low-pressure chemical vapour deposition of nanograin polysilicon ultra-thin films
S Ecoffey, D Bouvet, AM Ionescu, P Fazan
Nanotechnology 13 (3), 290, 2002
SETMOS: a Novel True Hybrid SET-CMOS Cell with High Current and Coulomb Blockade for Future Nano-scale Analog ICs
S Mahapatra, V Pott, S Ecoffey, C Wasshuber, K Banerjee, J Tringe, ...
IEDM, 2003
SiO2 shallow nanostructures ICP etching using ZEP electroresist
M Guilmain, A Jaouad, S Ecoffey, D Drouin
Microelectronic Engineering, 2011
A damascene platform for controlled ultra-thin nanowire fabrication
M Guilmain, T Labbaye, F Dellenbach, C Nauenheim, D Drouin, S Ecoffey
Nanotechnology 24 (24), 245305, 2013
Nano-wires for room temperature operated hybrid CMOS-NANO integrated circuits
S Ecoffey, V Pott, D Bouvet, M Mazza, S Mahapatra, A Schmid, ...
Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC …, 2005
Highly transparent low capacitance plasma enhanced atomic layer deposition Al2O3-HfO2 tunnel junction engineering
K El Hajjam, N Baboux, F Calmon, A Souifi, O Poncelet, LA Francis, ...
Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films 32 (1 …, 2014
Tunnel Junction Engineering for Optimized Metallic Single-Electron Transistor
KG El Hajjam, MA Bounouar, N Baboux, S Ecoffey, M Guilmain, E Puyoo, ...
IEEE Transactions on Electron Devices 62 (9), 2998-3003, 2015
A hybrid CMOS–SET co-fabrication platform using nano-grain polysilicon wires
S Ecoffey, V Pott, S Mahapatra, D Bouvet, P Fazan, AM Ionescu
Microelectronic engineering 78, 239-243, 2005
Single Electron Transistor Analytical Model for Hybrid Circuit Design
MA Bounouar, F Calmon, A Beaumont, M Guilmain, W Xuan, S Ecoffey, ...
Technology platform for the fabrication of titanium nanostructures
S Ecoffey, M Guilmain, JF Morissette, F Bourque, J Pont, BL Sang, ...
Recent Developments on 3d Integration of Metallic Set onto CMOS Process for Memory Application
N Jouvet, MA Bounouar, S Ecoffey, C Nauenheim, A Beaumont, ...
International Journal of Nanoscience 11 (04), 1240024, 2012
A new logic family based on hybrid MOSFET-polysilicon nanowires
S Ecoffey, M Mazza, V Pott, D Bouvet, A Schmid, Y Leblebici, MJ Declercq, ...
IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest …, 2005
Investigation of resistive switching and transport mechanisms of Al2O3/TiO2−x memristors under cryogenic conditions (1.5 K)
Y Beilliard, F Paquette, F Brousseau, S Ecoffey, F Alibart, D Drouin
AIP Advances 10 (2), 025305, 2020
Ultrahigh-Sensitive CMOS pH Sensor Developed in the BEOL of Standard 28 nm UTBB FDSOI
GT Ayele, S Monfray, S Ecoffey, F Boeuf, JP Cloarec, D Drouin, A Souifi
IEEE Journal of the Electron Devices Society 6, 1026-1032, 2018
Fabrication of Planar Back End of Line Compatible HfO Complementary Resistive Switches
M Labalette, S Jeannot, S Blonkowski, Y Beilliard, S Ecoffey, A Souifi, ...
IEEE Transactions on Nanotechnology 16 (5), 745-751, 2017
A porous Ge/Si interface layer for defect-free III-V multi-junction solar cells on silicon
YA Bioud, MN Beattie, A Boucherif, M Jellit, R Stricher, S Ecoffey, ...
Physics, Simulation, and Photonic Engineering of Photovoltaic Devices VIII …, 2019
High sensitivity pH sensing on the BEOL of industrial FDSOI transistors
L Rahhal, GT Ayele, S Monfray, JP Cloarec, B Fornacciari, E Pardoux, ...
Solid-State Electronics 134, 22-29, 2017
A Fabrication Process for Emerging Nanoelectronic Devices Based on Oxide Tunnel Junctions
D Drouin, G Droulers, M Labalette, B Lee Sang, P Harvey-Collard, ...
Journal of Nanomaterials 2017, 2017
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