Vivienne Sze
Vivienne Sze
Associate Professor, EECS at MIT
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Zitiert von
Zitiert von
Eyeriss: An energy-efficient reconfigurable accelerator for deep convolutional neural networks
YH Chen, T Krishna, J Emer, V Sze
2016 IEEE International Solid-State Circuits Conference (ISSCC), 262-263, 2016
Efficient Processing of Deep Neural Networks: A Tutorial and Survey
V Sze, YH Chen, TJ Yang, J Emer
Proceedings of the IEEE 105 (12), 2295-2329, 2017
Eyeriss: A Spatial Architecture for Energy-Efficient Dataflow for Convolutional Neural Networks
YH Chen, J Emer, V Sze
International Symposium on Computer Architecture (ISCA), 2016
High Efficiency Video Coding (HEVC): Algorithms and Architectures
V Sze, M Budagavi, GJ Sullivan
Springer, 2014
Designing Energy-Efficient Convolutional Neural Networks Using Energy-Aware Pruning
TJ Yang, YH Chen, V Sze
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2017
Eyeriss v2: A flexible accelerator for emerging deep neural networks on mobile devices
YH Chen, TJ Yang, J Emer, V Sze
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 9 (2 …, 2019
High Throughput CABAC Entropy Coding in HEVC
V Sze, M Budagavi
IEEE Transactions on Circuits and Systems for Video Technology 22 (12), 1778 …, 2012
NetAdapt: Platform-aware neural network adaptation for mobile applications
TJ Yang, A Howard, B Chen, X Zhang, A Go, M Sandler, V Sze, H Adam
European Conference on Computer Vision (ECCV), 2018
Core Transform Design in the High Efficiency Video Coding (HEVC) Standard
M Budagavi, A Fuldseth, G Bjontegaard, V Sze, M Sadafale
IEEE Journal of Selected Topics in Signal Processing 7 (6), 1029-1041, 2013
Hardware for Machine Learning: Challenges and Opportunities
V Sze, YH Chen, J Emer, A Suleiman, Z Zhang
Custom Integrated Circuits Conference (CICC), 2017 IEEE, 1-8, 2017
Technologies for Ultradynamic Voltage Scaling
AP Chandrakasan, DC Daly, DF Finchelstein, J Kwong, YK Ramadass, ...
Proceedings of the IEEE 98 (2), 191-214, 2010
A 249-Mpixel/s HEVC video-decoder chip for 4K Ultra-HD applications
M Tikekar, CT Huang, C Juvekar, V Sze, AP Chandrakasan
IEEE Journal of Solid-State Circuits 49 (1), 61-72, 2014
Parallel motion estimation in video coding
US Patent 20,120,257,678, 2015
Low-Power Impulse UWB Architectures and Circuits
AP Chandrakasan, FS Lee, DD Wentzloff, V Sze, BP Ginsburg, ...
Proceedings of the IEEE 97 (2), 332-352, 2009
Using Dataflow to Optimize Energy Efficiency of Deep Neural Network Accelerators
YH Chen, J Emer, V Sze
IEEE Micro’s Top Picks from the Computer Architecture Conferences 37 (3), 2017
Parallel CABAC decoding for video decompression
MU Demircin, V Sze, M Budagavi
US Patent 7,932,843, 2011
CE10: Core transform design for HEVC
A Fuldseth, G Bjøntegaard, M Budagavi, V Sze
document JCTVC-G495 of JCT-VC, 2011
Towards closing the energy gap between HOG and CNN features for embedded vision
A Suleiman, YH Chen, J Emer, V Sze
2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017
An energy-efficient hardware implementation of HOG-based object detection at 1080HD 60 fps with multi-scale support
A Suleiman, V Sze
Journal of Signal Processing Systems 84 (3), 325-337, 2016
Sample adaptive offset (SAO) parameter signaling
V Sze, M Budagavi, W Kim, DK Kwon, M Zhou
US Patent 8,923,407, 2014
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