Mahesh Nanjundappa
Title
Cited by
Cited by
Year
SCGPSim: A fast SystemC simulator on GPUs
M Nanjundappa, HD Patel, BA Jose, SK Shukla
2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC), 149-154, 2010
772010
Accelerating SystemC Simulations using GPUs
M Nanjundappa, A Kaushik, HD Patel, SK Shukla
IEEE International High Level Design Validation and Test Workshop (HLDVT …, 2012
38*2012
Synthesizing Embedded Software with Safety Wrappers through Polyhedral Analysis in a Polychronous Framework
M Nanjundappa, M Kracht, J Ouy, SK Shukla
IEEE Electronic System Level Synthesis Conference 2012, 24-29, 2012
152012
A new multi-threaded code synthesis methodology and tool for correct-by-construction synthesis from polychronous specifications
M Nanjundappa, M Kracht, J Ouy, SK Shukla
2013 13th International Conference on Application of Concurrency to System …, 2013
92013
Accelerating Hardware Simulation on Multi-cores
M Nanjundappa
Virginia Tech, 2010
52010
Verification of unit and dimensional consistencies in polychronous specifications
M Nanjundappa, SK Shukla
Proceedings of the 2014 Forum on Specification and Design Languages (FDL …, 2014
32014
Carp: A data communication mechanism for multi-core mixed-criticality systems
A Kaushik, P Tegegn, Z Wu, H Patel
2019 IEEE Real-Time Systems Symposium (RTSS), 419-432, 2019
22019
Techniques and Tools for Trustworthy Composition of Pre-Designed Embedded Software Components
SK Shukla, JR Ouy, M Nanjundappa, P Kumar, M Anderson, G Selvam, ...
VIRGINIA POLYTECHNIC INST AND STATE UNIV BLACKSBURG, 2012
12012
Observer for simulation test and verification
M Nanjundappa, SMS Nejhum, V Raghavan, K Balasubramanian, ...
US Patent 10,922,208, 2021
2021
Systems and methods for evaluating assessments
YP Khoo, J Kempf, K Bemalkhedkar, M Nanjundappa
US Patent App. 16/707,941, 2020
2020
Observer for simulation test and verification
M Nanjundappa, SMS Nejhum, V Raghavan, K Balasubramanian, ...
US Patent 10,684,936, 2020
2020
Industry Strength Tool and Technology for Automated Synthesis of Safety-Critical Applications from Formal Specifications
SK Shukla, M Nanjundappa, M Anderson, A Dayal, M Kracht
VIRGINIA POLYTECHNIC INST AND STATE UNIV BLACKSBURG, 2015
2015
Formal Techniques for Design and Development of Safety Critical Embedded Systems from Polychronous Models
M Nanjundappa
Virginia Tech, 2015
2015
Compiling polychronous programs into conditional partial orders for ASIP synthesis
M Nanjundappa, SK Shukla
Proceedings of the 2nd FME Workshop on Formal Methods in Software …, 2014
2014
A Formal Approach to the Provably Correct Synthesis of Mission Critical Embedded Software for Multi Core Embedded Platforms
S Shukla, M Nanjundappa, M Anderson, B Jose, M Kracht, J Ouy
VIRGINIA POLYTECHNIC INST AND STATE UNIV BLACKSBURG, 2014
2014
Compiling Polychronous Programs into Conditional Partial Orders for ASIP Synthesis
SK Shukla, M Nanjundappa
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