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Maurizio Martina
Maurizio Martina
Dipartimento di Elettronica e Telecomunicazioni, Politecnico di Torino
Bestätigte E-Mail-Adresse bei polito.it
Titel
Zitiert von
Zitiert von
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Hardware and software optimizations for accelerating deep neural networks: Survey of current trends, challenges, and the road ahead
M Capra, B Bussolino, A Marchisio, G Masera, M Martina, M Shafique
IEEE Access 8, 225134-225180, 2020
2042020
An updated survey of efficient hardware architectures for accelerating deep convolutional neural networks
M Capra, B Bussolino, A Marchisio, M Shafique, G Masera, M Martina
Future Internet 12 (7), 113, 2020
1992020
Edge computing: A survey on the hardware requirements in the internet of things world
M Capra, R Peloso, G Masera, M Ruo Roch, M Martina
Future Internet 11 (4), 100, 2019
1592019
Optimization and implementation of the integer wavelet transform for image coding
M Grangetto, E Magli, M Martina, G Olmo
IEEE transactions on image processing 11 (6), 596-604, 2002
1532002
An efficient spiking neural network for recognizing gestures with a dvs camera on the loihi neuromorphic processor
R Massa, A Marchisio, M Martina, M Shafique
2020 International Joint Conference on Neural Networks (IJCNN), 1-9, 2020
1242020
Multiplierless, folded 9/7–5/3 wavelet VLSI architecture
M Martina, G Masera
IEEE Transactions on Circuits and Systems II: Express Briefs 54 (9), 770-774, 2007
972007
VLSI implementation of a multi-mode turbo/LDPC decoder architecture
C Condo, M Martina, G Masera
IEEE Transactions on Circuits and Systems I: Regular Papers 60 (6), 1441-1454, 2012
802012
High speed architectures for finding the first two maximum/minimum values
LG Amaru, M Martina, G Masera
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20 (12 …, 2011
672011
Low-complexity, efficient 9/7 wavelet filters VLSI implementation
M Martina, G Masera
IEEE Transactions on Circuits and Systems II: Express Briefs 53 (11), 1289-1293, 2006
652006
A VLSI architecture for IWT (integer wavelet transform)
M Martina, G Masera, G Piccinini, M Zamboni
Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat …, 2000
622000
On optimal and near-optimal turbo decoding using generalized max operator
S Papaharalabos, PT Mathiopoulos, G Masera, M Martina
IEEE Communications Letters 13 (7), 522-524, 2009
612009
Carsnn: An efficient spiking neural network for event-based autonomous cars on the loihi neuromorphic research processor
A Viale, A Marchisio, M Martina, G Masera, M Shafique
2021 International Joint Conference on Neural Networks (IJCNN), 1-10, 2021
562021
NASCaps: A framework for neural architecture search to optimize the accuracy and hardware efficiency of convolutional capsule networks
A Marchisio, A Massa, V Mrazek, B Bussolino, M Martina, M Shafique
Proceedings of the 39th International Conference on Computer-Aided Design, 1-9, 2020
562020
Adaptive approximated DCT architectures for HEVC
M Masera, M Martina, G Masera
IEEE Transactions on Circuits and Systems for Video Technology 27 (12), 2714 …, 2016
552016
Is spiking secure? a comparative study on the security vulnerabilities of spiking and deep neural networks
A Marchisio, G Nanfa, F Khalid, MA Hanif, M Martina, M Shafique
2020 International Joint Conference on Neural Networks (IJCNN), 1-8, 2020
51*2020
Motion estimation and CABAC VLSI co-processors for real-time high-quality H. 264/AVC video coding
S Saponara, M Martina, M Casula, L Fanucci, G Masera
Microprocessors and Microsystems 34 (7-8), 316-328, 2010
462010
Turbo NOC: A framework for the design of network-on-chip-based turbo decoder architectures
M Martina, G Masera
IEEE Transactions on Circuits and Systems I: Regular Papers 57 (10), 2776-2789, 2010
442010
A flexible UMTS-WiMax turbo decoder architecture
M Martina, M Nicola, G Masera
IEEE Transactions on Circuits and Systems II: Express Briefs 55 (4), 369-373, 2008
432008
An LDPC decoder architecture for wireless sensor network applications
AD Giancarlo Biroli, M Martina, G Masera
Sensors 12 (2), 1529-1543, 2012
392012
Neuroattack: Undermining spiking neural networks security through externally triggered bit-flips
V Venceslai, A Marchisio, I Alouani, M Martina, M Shafique
2020 International Joint Conference on Neural Networks (IJCNN), 1-8, 2020
382020
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