Kubilay Atasu
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Automatic application-specific instruction-set extensions under microarchitectural constraints
K Atasu, L Pozzi, P Ienne
International Journal of Parallel Programming 31 (6), 411-428, 2003
Exact and approximate algorithms for the extension of embedded processor instruction sets
L Pozzi, K Atasu, P Ienne
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2006
An integer linear programming approach for identifying instruction-set extensions
K Atasu, G Dündar, C Özturan
Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware …, 2005
Introduction of local memory elements in instruction set extensions
P Biswas, V Choudhary, K Atasu, L Pozzi, P Ienne, N Dutt
Proceedings of the 41st annual Design Automation Conference, 729-734, 2004
Designing a programmable wire-speed regular-expression matching accelerator
J Van Lunteren, C Hagleitner, T Heil, G Biran, U Shvadron, K Atasu
2012 45th Annual IEEE/ACM International Symposium on Microarchitecture, 461-472, 2012
Efficient AES implementations for ARM based platforms
K Atasu, L Breveglieri, M Macchetti
Proceedings of the 2004 ACM symposium on Applied computing, 841-845, 2004
Fast custom instruction identification by convex subgraph enumeration
K Atasu, O Mencer, W Luk, C Ozturan, G Dundar
2008 International Conference on Application-Specific Systems, Architectures …, 2008
CHIPS: Custom hardware instruction processor synthesis
K Atasu, C Ozturan, GÜ Dundar, O Mencer, W Luk
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008
Optimizing instruction-set extensible processors under data bandwidth constraints
K Atasu, RG Dimond, O Mencer, W Luk, C Ozturan, G Dundar
2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007
FISH: Fast instruction synthesis for custom processors
K Atasu, W Luk, O Mencer, C Ozturan, G Dundar
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20 (1), 52-65, 2012
Linear-Complexity Data-Parallel Earth Mover’s Distance Approximations
K Atasu, T Mittelholzer
International Conference on Machine Learning, 364-373, 2019
Memory-efficient distribution of regular expressions for fast deep packet inspection
J Rohrer, K Atasu, J van Lunteren, C Hagleitner
Proceedings of the 7th IEEE/ACM international conference on Hardware …, 2009
Addressing Interpretability and Cold-Start in Matrix Factorization for Recommender Systems
M Vlachos, C Dünner, R Heckel, VG Vassiliadis, T Parnell, K Atasu
IEEE Transactions on Knowledge and Data Engineering 31 (7), 1253-1266, 2018
Hardware-accelerated regular expression matching for high-throughput text analytics
K Atasu, R Polig, C Hagleitner, FR Reiss
2013 23rd International Conference on Field programmable Logic and …, 2013
Hardware-accelerated regular expression matching with overlap handling on ibm poweren processor
K Atasu, F Doerfler, J van Lunteren, C Hagleitner
2013 IEEE 27th International Symposium on Parallel and Distributed …, 2013
Giving text analytics a boost
R Polig, K Atasu, L Chiticariu, C Hagleitner, HP Hofstee, FR Reiss, H Zhu, ...
IEEE Micro 34 (4), 6-14, 2014
Manycore Clique Enumeration with Fast Set Intersections
J Blanuša, R Stoica, P Ienne, K Atasu
Proceedings of the VLDB Endowment 13 (11), 2020
Understanding and optimizing the performance of distributed machine learning applications on apache spark
C Dünner, T Parnell, K Atasu, M Sifalakis, H Pozidis
2017 IEEE International Conference on Big Data (Big Data), 331-338, 2017
Large-scale stochastic learning using GPUs
T Parnell, C Dünner, K Atasu, M Sifalakis, H Pozidis
2017 IEEE International Parallel and Distributed Processing Symposium …, 2017
Linear-complexity relaxed word Mover's distance with GPU acceleration
K Atasu, T Parnell, C Dünner, M Sifalakis, H Pozidis, V Vasileiadis, ...
2017 IEEE International Conference on Big Data (Big Data), 889-896, 2017
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