| Enabling energy-efficient unsupervised monocular depth estimation on armv7-based platforms V Peluso, A Cipolletta, A Calimera, M Poggi, F Tosi, S Mattoccia 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2019 | 28 | 2019 |
| Monocular depth perception on microcontrollers for edge applications V Peluso, A Cipolletta, A Calimera, M Poggi, F Tosi, F Aleotti, S Mattoccia IEEE Transactions on Circuits and Systems for Video Technology 32 (3), 1524-1536, 2021 | 16 | 2021 |
| All-digital embedded meters for on-line power estimation DJ Pagliari, V Peluso, Y Chen, A Calimera, E Macii, M Poncino 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 737-742, 2018 | 16 | 2018 |
| Performance profiling of embedded convnets under thermal-aware dvfs V Peluso, RG Rizzo, A Calimera Electronics 8 (12), 1423, 2019 | 14 | 2019 |
| Scalable-effort convnets for multilevel classification V Peluso, A Calimera 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2018 | 12 | 2018 |
| Optimality assessment of memory-bounded convnets deployed on resource-constrained risc cores M Grimaldi, V Peluso, A Calimera IEEE Access 7, 152599-152611, 2019 | 11 | 2019 |
| Design-space exploration of pareto-optimal architectures for deep learning with dvfs G Santoro, MR Casu, V Peluso, A Calimera, M Alioto 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018 | 11 | 2018 |
| Object based modelling of hybrid electrical vehicle and power management control A Bolzoni, A La Bella, D Moschetta, G Musacci, G Gruosso, GS Gajani, ... 2015 IEEE 1st International Forum on Research and Technologies for Society …, 2015 | 10 | 2015 |
| Weak-mac: Arithmetic relaxation for dynamic energy-accuracy scaling in convnets V Peluso, A Calimera 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018 | 9 | 2018 |
| Ultra-fine grain vdd-hopping for energy-efficient multi-processor SoCs V Peluso, A Calimera, E Macii, M Aliotoy 2016 IFIP/IEEE International Conference on Very Large Scale Integration …, 2016 | 9 | 2016 |
| Energy-quality scalable monocular depth estimation on low-power cpus A Cipolletta, V Peluso, A Calimera, M Poggi, F Tosi, F Aleotti, S Mattoccia IEEE Internet of Things Journal 9 (1), 25-36, 2021 | 8 | 2021 |
| Inference on the edge: Performance analysis of an image classification task using off-the-shelf cpus and open-source convnets V Peluso, RG Rizzo, A Cipolletta, A Calimera 2019 Sixth International Conference on Social Networks Analysis, Management …, 2019 | 8 | 2019 |
| Beyond ideal DVFS through ultra-fine grain vdd-hopping V Peluso, RG Rizzo, A Calimera, E Macii, M Alioto VLSI-SoC: System-on-Chip in the Nanoscale Era–Design, Verification and …, 2017 | 8 | 2017 |
| Energy-performance design exploration of a low-power microprogrammed deep-learning accelerator G Santoro, MR Casu, V Peluso, A Calimera, M Alioto 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2018 | 7 | 2018 |
| Early bird sampling: a short-paths free error detection-correction strategy for data-driven VOS RG Rizzo, V Peluso, A Calimera, J Zhou, X Liu 2017 IFIP/IEEE International Conference on Very Large Scale Integration …, 2017 | 7 | 2017 |
| Energy-driven precision scaling for fixed-point ConvNets V Peluso, A Calimera 2018 IFIP/IEEE International Conference on Very Large Scale Integration …, 2018 | 5 | 2018 |
| AdapTTA: adaptive test-time augmentation for reliable embedded convnets L Mocerino, RG Rizzo, V Peluso, A Calimera, E Macii 2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration …, 2021 | 3 | 2021 |
| Tvfs: Topology voltage frequency scaling for reliable embedded convnets RG Rizzo, V Peluso, A Calimera IEEE Transactions on Circuits and Systems II: Express Briefs 68 (2), 672-676, 2020 | 3 | 2020 |
| Efficacy of topology scaling for temperature and latency constrained embedded convnets V Peluso, RG Rizzo, A Calimera Journal of Low Power Electronics and Applications 10 (1), 10, 2020 | 3 | 2020 |
| Energy-accuracy scalable deep convolutional neural networks: A Pareto analysis V Peluso, A Calimera VLSI-SoC: Design and Engineering of Electronics Systems Based on New …, 2019 | 3 | 2019 |
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