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John Hennessy
John Hennessy
Verified email at stanford.edu - Homepage
Title
Cited by
Cited by
Year
Computer architecture: a quantitative approach
JL Hennessy, DA Patterson
Elsevier, 2011
184602011
Computer organization and design ARM edition: the hardware software interface
DA Patterson, JL Hennessy
Morgan kaufmann, 2016
61602016
Computer architecture
DA Patterson, FP Brooks Jr, IE Sutherland, CP Thacker
Elsevier Science, 2011
27132011
Memory consistency and event ordering in scalable shared-memory multiprocessors
K Gharachorloo, D Lenoski, J Laudon, P Gibbons, A Gupta, J Hennessy
ACM SIGARCH Computer Architecture News 18 (2SI), 15-26, 1990
18221990
The stanford dash multiprocessor
D Lenoski, J Laudon, K Gharachorloo, WD Weber, A Gupta, J Hennessy, ...
Computer 25 (3), 63-79, 1992
14681992
The stanford flash multiprocessor
J Kuskin, D Ofelt, M Heinrich, J Heinlein, R Simoni, K Gharachorloo, ...
Proceedings of the 21ST annual international symposium on Computer …, 1994
10911994
The directory-based cache coherence protocol for the DASH multiprocessor
D Lenoski, J Laudon, K Gharachorloo, A Gupta, J Hennessy
ACM SIGARCH Computer Architecture News 18 (2SI), 148-159, 1990
9951990
An evaluation of directory schemes for cache coherence
A Agarwal, R Simoni, J Hennessy, M Horowitz
ACM SIGARCH Computer Architecture News 16 (2), 280-298, 1988
8641988
SUIF: An infrastructure for research on parallelizing and optimizing compilers
RP Wilson, RS French, CS Wilson, SP Amarasinghe, JM Anderson, ...
ACM Sigplan Notices 29 (12), 31-37, 1994
7711994
A new golden age for computer architecture
JL Hennessy, DA Patterson
Communications of the ACM 62 (2), 48-60, 2019
6752019
The priority-based coloring approach to register allocation
FC Chow, JL Hennessy
ACM Transactions on Programming Languages and Systems (TOPLAS) 12 (4), 501-536, 1990
5371990
An analytical cache model
A Agarwal, J Hennessy, M Horowitz
ACM Transactions on Computer Systems (TOCS) 7 (2), 184-215, 1989
4671989
Computer architecture
JL Hennessy, DA Patterson
Los Altos, CA (USA); Morgan Kaufman Publishers, Inc., 1990
434*1990
Cache performance of operating system and multiprogramming workloads
A Agarwal, J Hennessy, M Horowitz
ACM Transactions on Computer Systems (TOCS) 6 (4), 393-431, 1988
3991988
Register allocation by priority-based coloring
F Chow, J Hennessy
Proceedings of the 1984 SIGPLAN symposium on Compiler construction, 222-232, 1984
3621984
Performance evaluation of memory consistency models for shared-memory multiprocessors
K Gharachorloo, A Gupta, J Hennessy
ACM SIGPLAN Notices 26 (4), 245-257, 1991
3591991
Two techniques to enhance the performance of memory consistency models
K Gharachorloo, A Gupta, JL Hennessy
Computer Systems Laboratory, Stanford University, 1991
3501991
Load balancing and data locality in adaptive hierarchical N-body methods: Barnes-Hut, fast multipole, and radiosity
JP Singh, C Holt, T Totsuka, A Gupta, J Hennessy
Journal of Parallel and Distributed Computing 27 (2), 118-141, 1995
3481995
Postpass code optimization of pipeline constraints
JL Hennessy, T Gross
ACM Transactions on Programming Languages and Systems (TOPLAS) 5 (3), 422-448, 1983
3421983
False sharing and spatial locality in multiprocessor caches
J Torrellas, HS Lam, JL Hennessy
IEEE Transactions on Computers 43 (6), 651-663, 1994
3391994
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