| A cross-debugging method for hardware/software co-design environments Y Kra Proceedings of the 30th international Design Automation Conference, 673-677, 1993 | 9 | 1993 |
| A RISC-V-based research platform for rapid design cycle E Garzón, R Golman, O Harel, T Noy, Y Kra, A Pollock, S Yuzhaninov, ... 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2614-2615, 2022 | 3 | 2022 |
| Methods and apparatuses for processing data channels Y Kra, Y Berger, M De-Leon, B Perlman US Patent 7,492,825, 2009 | 3 | 2009 |
| WP 2.0: Signoff-Quality Implementation and Validation of Energy-Efficient Clock-Less Wave Propagated Pipelining Y Kra, N Tzachi, T Adam Design, Automation and Test in Europe Conference, 1574-1579, 2021 | 2 | 2021 |
| Physically Aware Affinity-Driven Multiplier Implementation O Maltabashi, Y Kra, A Teman IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2019 | 2 | 2019 |
| HAMSA-DI: A Low-Power Dual-Issue RISC-V Core Targeting Energy-Efficient Embedded Systems Y Kra, Y Shoshan, Y Rudin, A Teman IEEE Transactions on Circuits and Systems I, 2023 | 1 | 2023 |
| Skew-balancing algorithm for digital circuitry A Teman, Y Kra, T Noy US Patent 11,556,145, 2023 | 1 | 2023 |
| SerOpt: transistor sizing algorithm and optimization utility for minimizing soft error rate Y Kra, Y Weitzman, A Teman 2022 37th Conference on Design of Circuits and Integrated Circuits (DCIS), 01-06, 2022 | 1 | 2022 |
| Silicon-Proven Clockless Wave-Propagated Pipelining for High-Throughput, Energy-Efficient Processing Y Kra, A Teman 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 1138-1139, 2022 | 1 | 2022 |
| Wavepro: clock-less wave-propagated pipeline compiler for low-power and high-throughput computation Y Kra, T Noy, A Teman 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2020 | 1 | 2020 |
| Systems and methods for providing framing mapping, muxing and data processing M De-Leon, Y Berger, Y Kra, B Perlman US Patent 8,228,943, 2012 | | 2012 |
