| An architecture for fault-tolerant computation with stochastic logic W Qian, X Li, MD Riedel, K Bazargan, DJ Lilja IEEE transactions on computers 60 (1), 93-105, 2010 | 478 | 2010 |
| Computation on stochastic bit streams digital image processing case studies P Li, DJ Lilja, W Qian, K Bazargan, MD Riedel IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (3), 449-462, 2013 | 282 | 2013 |
| The promise and challenge of stochastic computing A Alaghi, W Qian, JP Hayes IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017 | 246 | 2017 |
| The synthesis of robust polynomial arithmetic with stochastic logic W Qian, MD Riedel Proceedings of the 45th annual Design Automation Conference, 648-653, 2008 | 175 | 2008 |
| A new approximate adder with low relative error and correct sign calculation J Hu, W Qian 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2015 | 98 | 2015 |
| Logical computation on stochastic bit streams with linear finite-state machines P Li, DJ Lilja, W Qian, MD Riedel, K Bazargan IEEE Transactions on Computers 63 (6), 1474-1486, 2012 | 89 | 2012 |
| The synthesis of complex arithmetic computation on stochastic bit streams using sequential logic P Li, DJ Lilja, W Qian, K Bazargan, M Riedel Proceedings of the International Conference on Computer-Aided Design, 480-487, 2012 | 82 | 2012 |
| Transforming probabilities with combinational logic W Qian, MD Riedel, H Zhou, J Bruck IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2011 | 73 | 2011 |
| Uniform approximation and Bernstein polynomials with coefficients in the unit interval W Qian, MD Riedel, I Rosenberg European Journal of Combinatorics 32 (3), 448-463, 2011 | 70 | 2011 |
| An efficient method for multi-level approximate logic synthesis under error rate constraint Y Wu, W Qian Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016 | 64 | 2016 |
| The synthesis of linear finite state machine-based stochastic computational elements P Li, W Qian, MD Riedel, K Bazargan, DJ Lilja 17th Asia and South Pacific Design Automation Conference, 757-762, 2012 | 58 | 2012 |
| An efficient method for calculating the error statistics of block-based approximate adders Y Wu, Y Li, X Ge, Y Gao, W Qian IEEE Transactions on Computers 68 (1), 21-38, 2018 | 55* | 2018 |
| The synthesis of combinational logic to generate probabilities W Qian, MD Riedel, K Bazargan, DJ Lilja Proceedings of the 2009 International Conference on Computer-Aided Design …, 2009 | 48 | 2009 |
| A reconfigurable stochastic architecture for highly reliable computing X Li, W Qian, MD Riedel, K Bazargan, DJ Lilja Proceedings of the 19th ACM Great Lakes symposium on VLSI, 315-320, 2009 | 44 | 2009 |
| Approximate logic synthesis for FPGA by wire removal and local function change Y Wu, C Shen, Y Jia, W Qian 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), 163-169, 2017 | 42 | 2017 |
| Towards theoretical cost limit of stochastic number generators for stochastic computing M Yang, B Li, DJ Lilja, B Yuan, W Qian 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 154-159, 2018 | 32 | 2018 |
| A stochastic reconfigurable architecture for fault-tolerant computation with sequential logic P Li, W Qian, DJ Lilja 2012 IEEE 30th International Conference on Computer Design (ICCD), 303-308, 2012 | 32 | 2012 |
| PAM: A piecewise-linearly-approximated floating-point multiplier with unbiasedness and configurability C Chen, W Qian, M Imani, X Yin, C Zhuo IEEE Transactions on Computers 71 (10), 2473-2486, 2021 | 28 | 2021 |
| Efficient batch statistical error estimation for iterative multi-level approximate logic synthesis S Su, Y Wu, W Qian Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018 | 28 | 2018 |
| Optimally approximated and unbiased floating-point multiplier with runtime configurability C Chen, S Yang, W Qian, M Imani, X Yin, C Zhuo Proceedings of the 39th international conference on computer-aided design, 1-9, 2020 | 24 | 2020 |
