Christian Enz
Zitiert von
Zitiert von
Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization
CC Enz, GC Temes
Proceedings of the IEEE 84 (11), 1584-1614, 1996
An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applications
CC Enz, F Krummenacher, EA Vittoz
Analog integrated circuits and signal processing 8, 83-114, 1995
Minimum-energy broadcast in all-wireless networks: NP-completeness and distribution issues
M Čagalj, JP Hubaux, C Enz
Proceedings of the 8th annual international conference on Mobile computing …, 2002
Charge-based MOS transistor modeling: the EKV model for low-power and RF IC design
CC Enz, EA Vittoz
John Wiley & Sons, 2006
WiseNET: an ultralow-power wireless sensor network solution
CC Enz, A El-Hoiydi, JD Decotignie, V Peiris
Computer 37 (8), 62-70, 2004
MOS transistor modeling for RF IC design
C Enz, Y Cheng
IEEE Journal of Solid-State Circuits 35 (2), 186-201, 2000
A CMOS chopper amplifier
CC Enz, EA Vittoz, F Krummenacher
IEEE Journal of Solid-State Circuits 22 (3), 335-342, 1987
WiseMAC, an ultra low power MAC protocol for the wiseNET wireless sensor network
A El-Hoiydi, JD Decotignie, C Enz, E Le Roux
Proceedings of the 1st international conference on Embedded networked sensor …, 2003
Design of high-Q varactors for low-power wireless applications using a standard CMOS process
AS Porret, T Melly, CC Enz, EA Vittoz
IEEE Journal of Solid-State Circuits 35 (3), 337-345, 2000
An MOS transistor model for RF IC design valid in all regions of operation
C Enz
IEEE Transactions on Microwave Theory and Techniques 50 (1), 342-359, 2002
CMOS low-power analog circuit design
CC Enz, EA Vittoz
Emerging Technologies: Designing Low Power Digital Systems, 79-133, 1996
A design oriented charge-based current model for symmetric DG MOSFET and its correlation with the EKV formalism
JM Sallese, F Krummenacher, F Prégaldiny, C Lallement, A Roy, C Enz
Solid-State Electronics 49 (3), 485-489, 2005
Accurate modeling and parameter extraction for MOS transistors valid up to 10 GHz
SHM Jen, CC Enz, DR Pehlke, M Schroter, BJ Sheu
IEEE Transactions on Electron Devices 46 (11), 2217-2227, 1999
Cryogenic MOS transistor model
A Beckers, F Jazaeri, C Enz
IEEE Transactions on Electron Devices 65 (9), 3617-3625, 2018
Theoretical limit of low temperature subthreshold swing in field-effect transistors
A Beckers, F Jazaeri, C Enz
IEEE Electron Device Letters 41 (2), 276-279, 2019
Characterization and modeling of 28-nm bulk CMOS technology down to 4.2 K
A Beckers, F Jazaeri, C Enz
IEEE Journal of the Electron Devices Society 6, 1007-1018, 2018
Energy parsimonious circuit design through probabilistic pruning
A Lingamneni, C Enz, JL Nagel, K Palem, C Piguet
2011 Design, Automation & Test in Europe, 1-6, 2011
An ultralow-power UHF transceiver integrated in a standard digital CMOS process: architecture and receiver
AS Porret, T Melly, D Python, CC Enz, EA Vittoz
IEEE Journal of Solid-State Circuits 36 (3), 452-466, 2001
BSIM6: Analog and RF compact model for bulk MOSFET
YS Chauhan, S Venugopalan, MA Chalkiadaki, MAU Karim, H Agarwal, ...
IEEE Transactions on Electron Devices 61 (2), 234-244, 2013
The EPFL-EKV MOSFET model equations for simulation
M Bucher, C Lallement, C Enz, F Théodoloz, F Krummenacher
Version 2.6, 1998
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